Growing community of inventors

Herzogenrath, Germany

Andreas Hoffmann

Average Co-Inventor Count = 4.06

ph-index = 7

The patent ph-index is calculated by counting the number of publications for which an author has been cited by other authors at least that same number of times.

Forward Citations = 132

Andreas HoffmannGunnar Braun (15 patents)Andreas HoffmannAchim Nohl (8 patents)Andreas HoffmannVolker Greive (6 patents)Andreas HoffmannRainer Leupers (5 patents)Andreas HoffmannOliver Schliebusch (3 patents)Andreas HoffmannJianjiang Ceng (2 patents)Andreas HoffmannHeinrich Myer (2 patents)Andreas HoffmannOlaf Zorres (2 patents)Andreas HoffmannGideon Intrater (1 patent)Andreas HoffmannHeinrich Meyr (1 patent)Andreas HoffmannLudwig Rieder (1 patent)Andreas HoffmannOlaf W J Zerres (1 patent)Andreas HoffmannVolker Grieve (1 patent)Andreas HoffmannOlaf Lüthje (1 patent)Andreas HoffmannManuel Hohenauer (1 patent)Andreas HoffmannFrank Fiedler (1 patent)Andreas HoffmannAndreas Hoffmann (15 patents)Gunnar BraunGunnar Braun (15 patents)Achim NohlAchim Nohl (11 patents)Volker GreiveVolker Greive (8 patents)Rainer LeupersRainer Leupers (9 patents)Oliver SchliebuschOliver Schliebusch (3 patents)Jianjiang CengJianjiang Ceng (2 patents)Heinrich MyerHeinrich Myer (2 patents)Olaf ZorresOlaf Zorres (2 patents)Gideon IntraterGideon Intrater (27 patents)Heinrich MeyrHeinrich Meyr (1 patent)Ludwig RiederLudwig Rieder (1 patent)Olaf W J ZerresOlaf W J Zerres (1 patent)Volker GrieveVolker Grieve (1 patent)Olaf LüthjeOlaf Lüthje (1 patent)Manuel HohenauerManuel Hohenauer (1 patent)Frank FiedlerFrank Fiedler (1 patent)
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Inventor’s number of patents
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Strength of working relationships

Company Filing History:

1. Synopsys, Inc. (12 from 2,487 patents)

2. Coware, Inc. (2 from 5 patents)

3. Mips Technologies, Inc. (1 from 271 patents)

4. Synposys, Inc. (1 from 2 patents)


15 patents:

1. 9383977 - Generation of compiler description from architecture description

2. 9280326 - Compiler retargeting based on instruction semantic models

3. 9064076 - User interface for facilitation of high level generation of processor extensions

4. 8898651 - Automatic generation of instruction-set documentation

5. 8706453 - Techniques for processor/memory co-exploration at multiple abstraction levels

6. 8689202 - Scheduling of instructions

7. 8677312 - Generation of compiler description from architecture description

8. 8554535 - Instruction-set architecture simulation techniques using just in time compilation

9. 8522221 - Techniques for automatic generation of instruction-set documentation

10. 8285535 - Techniques for processor/memory co-exploration at multiple abstraction levels

11. 8086438 - Method and system for instruction-set architecture simulation using just in time compilation

12. 8006225 - Method and system for automatic generation of instruction-set documentation from an abstract processor model described using a hierarchical architectural description language

13. 7788078 - Processor/memory co-exploration at multiple abstraction levels

14. 7373638 - Automatic generation of structure and control path using hardware description language

15. 7313773 - Method and device for simulator generation based on semantic to behavioral translation

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