Infineon Technologies Austria Ag

Infineon Technologies Ag

Andreas Haghofer

Hans-Joachim Schulze

Johannes Georg Laven

Martin Poelzl

Johannes Baumgartl

Ravi Keshav Joshi

Erich Griebl

Juergen Steinbrenner

Matthias Kuenle

Maria Cotorogea

Georg Ehrentraut

Christoph Gruber

Haybat Itani

Clemens Ostermaier

First and second cell trench structures extend from a first surface into a semiconductor substrate. The first cell trench structure includes a first buried electrode and a first insulator layer between the first buried electrode and a semiconductor mesa separating the first and second cell trench structures. A capping layer covers the first surface. The capping layer is patterned to form an opening having a minimum width larger than a thickness of the first insulator layer. The opening exposes a first vertical section of the first insulator layer at the first surface. An exposed portion of the first insulator layer is removed to form a recess between the semiconductor mesa and the first buried electrode. A contact structure is in the opening and the recess. The contact structure electrically connects both a buried zone in the semiconductor mesa and the first buried electrode and allows for narrower semiconductor mesa width.

Semiconductor device with cell trench structures and recessed contacts and method of manufacturing a semiconductor device

An etching tool that includes an interior chamber is provided. A plurality of type III-V semiconductor wafers is provided. A process cycle is performed for each one of the type III-V semiconductor wafers in the plurality. The process cycle includes performing a preliminary contamination control process. The process cycle further includes inserting one of the type III-V semiconductor wafers into the interior chamber. The process cycle further includes etching type III-V semiconductor material away from the type III-V semiconductor wafer that is present in the interior chamber. The process cycle further includes removing the type III-V semiconductor wafer that is present in the interior chamber. The preliminary contamination control process includes forming a carbon containing protective material that completely covers exposed surfaces of the interior chamber.

Method of conditioning an etch chamber for contaminant free etching of a semiconductor device

In one aspect, a method of forming a trench in a semiconductor material includes forming a first dielectric layer on a semiconductor substrate. The first dielectric layer includes first openings. An epitaxial layer is grown on the semiconductor substrate by an epitaxial lateral overgrowth process. The first openings are filled by the epitaxial layer and the epitaxial layer is grown onto adjacent portions of the first dielectric layer so that part of the first dielectric layer is uncovered by the epitaxial layer and a gap forms between opposing sidewalls of the epitaxial layer over the part of the first dielectric layer that is uncovered by the epitaxial layer. The gap defines a first trench in the epitaxial layer that extends to the first dielectric layer.

Method of forming a trench using epitaxial lateral overgrowth

Semiconductor device with cell trench structures and contacts and method of manufacturing a semiconductor device

Method of forming a trench using epitaxial lateral overgrowth and deep vertical trench structure

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Villach, Austria

Andreas Haghofer