Siemens Aktiengesellschaft

Infineon Technologies Ag

Andreas Graf Von Schwerin

Oskar Kowarik

Franz Schuler

Guido Wolfgang Dietz

A method for reading non-volatile semiconductor memory configurations includes determining a high threshold voltage and a low threshold voltage based on a charge state of a floating gate for a transistor, and applying a reverse bias between a bulk and a source of the transistor during reading.

Method for reading nonvolatile semiconductor memory configurations

In a non-volatile memory cell having a floating gate (EEPROM), it is necessary to achieve a large coupling capacitance between the floating gate and a control gate in which the gates take up as little space as possible. To that end, it is provided that a dielectric between the floating gate and the control gate runs, in portions, approximately perpendicularly to the surface of a semiconductor substrate, for example, with the control gate configured within a U-shaped or pot-shaped floating gate.

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München, Germany

Andreas Graf Von Schwerin