Novelics, LLC

Andreas Gotterba

Esin Terzioglu

Gil I Winograd

In one embodiment, a multi-port SRAM is provided that comprises: a single input port and output port 6-T SRAM; and a multi-port control block circuit that includes: a plurality of input registers corresponding to a plurality of input ports to register corresponding input signals; an input multiplexer to select from the input registers to provide a selected input signal to the 6-T SRAM's single input port; a plurality of output registers corresponding to a plurality of output ports to register corresponding output signals; and an output de-multiplexer to select from the output registers to provide an output signal from the 6-T SRAM's single output port to the selected output register.

Multi-port SRAM implemented with single-port 6-transistor memory cells coupled to an input multiplexer and an output demultiplexer

In one embodiment, a decoder for decoding an address having a plurality of bits ranging from a first address bit ato a last address bit a, each address bit being either true or false is provided that includes: a pre-charge circuit adapted to pre-charge a dynamic NOR node and a dynamic OR node and then allow the pre-charged dynamic NOR node and pre-charged dynamic OR node to float; a plurality of switches coupled between the dynamic NOR node and ground, each switch corresponding uniquely to the address bits such that the switches range from a first switch corresponding to ato an nth switch corresponding to a, wherein any switch corresponding to a true address bit is configured to turn on only if its corresponding address bit is false, and wherein any switch corresponding to a false address bit is configured to turn on only if its corresponding address bit is true; a (n+1)th switch coupling the dynamic OR node to ground, the (n+1)th switch being controlled such that it turns on if the dynamic OR node is charged, whereby the pre-charged dynamic OR node discharges if the dynamic OR node remains charged; an odd plurality of inverters coupled in series with the dynamic OR node; and a word line driven by the odd plurality of inverters.

Growing community of inventors

Aliso Viejo, CA, United States of America

Andreas Gotterba