Johns Hopkins University

Other

Andreas G Andreou

Philippe O Pouliquen

Charbel G Rizk

Joseph H Lin

Zaven Kalayjian

Ronald Eugene Reedy

Gene Y Fridman

Charles Coleman Della Santina

Alyssa B Apsel

Robert E Jenkins

Kim Strohbehn

Ravindra A Athale

Bryce Chiang

Francisco Tejada

George J Simonis

Miriam Adlerstein Marwick

Haje Korth

Thomas S Murray

Alyssa Apsel

Tomas Figliolia

Kwabena A Boahen

Kayode Sanni

Daniel R Mendat

Julius Georgiou

A reconfigurable computing architecture for Bayesian Online ChangePoint Detection (BOCPD) is provided. In an exemplary embodiment, the architecture may be employed for use in video processing, and more specifically to computing whether a pixel in a video sequence belongs to the background or to an object (foreground). Each pixel may be processed with only information from its intensity and its time history. The computing architecture employs unary fixed point representation for numbers in time, using pulse density or random pulse density modulation&#x2014;i.e., a stream of zeros and ones, where the mean of that stream represents the encoded value.

Hardware architecture and processing units for exact Bayesian inference with on-line learning and methods for same

The present disclosure may be embodied as systems and methods for action recognition developed using a multimodal dataset that incorporates both visual data, which facilitates the accurate tracking of movement, and active acoustic data, which captures the micro-Doppler modulations induced by the motion. The dataset includes twenty-one actions and focuses on examples of orientational symmetry that a single active ultrasound sensor should have the most difficulty discriminating. The combined results from three independent ultrasound sensors are encouraging, and provide a foundation to explore the use of data from multiple viewpoints to resolve the orientational ambiguity in action recognition. In various embodiments, recurrent neural networks using long short-term memory (LSTM) or hidden Markov models (HMMs) are disclosed for use in action recognition, for example, human action recognition, from micro-Doppler signatures.

Systems and method for action recognition using micro-doppler signatures and recurrent neural networks

A computational sensing array includes an array of sensing elements. In each sensing element, a first signal is generated from a transducer. A second signal is produced by a collection unit in response to receiving the first signal. The second signal may be modified, in a conditioning unit. A sensing element preprocessing unit generates a word representing the value of the modified second signal, and may produce an indication of change of the first signal. A current value of the word may be stored in a state holding element local to the sensing element, and a previous value of the word may be retained in a further state holding element local to the sensing element.

Flexible readout and signal processing in a computational sensor array

A photodetection circuit includes an avalanche photodiode and a mode switching circuit that may be configured to selectively switch an operating mode of the photodetection circuit between linear mode and Geiger mode. The photodetection circuit may further include a quenching circuit configured to quench and reset the avalanche photodiode in response to an avalanche event when the photodetection circuit is operated in Geiger mode. The photodetection circuit may additionally include an integration circuit configured to integrate photocurrent output by the photodiode and generate integrated charge units when the photodetection circuit is operated in linear mode. The photodetection circuit may also include a counter configured to count pulses output by the avalanche photodiode when the photodetection circuit is operated in Geiger mode and to count integrated charge units generated by the integration circuit when the photodetection circuit is operated in linear mode.

Photodetection circuit having at least one counter operative in response to a mode switching circuit and operating method thereof

A gas cell semiconductor chip assembly includes a gas cell including an alkali gas stored therein and a first semiconductor chip including a first resistive heating loop at a location corresponding to the gas cell to heat the gas cell and a second resistive heating loop around an outer perimeter of the first resistive heating loop. The second resistive heating loop is configured to cancel a magnetic field of the first resistive heating loop based on a current flowing through the first and second resistive heating loops.

Gas cell semiconductor chip assembly

A multichannel vestibular prosthesis includes a sensor system and a microcontroller configured to communicate with the sensor system to receive sensor signals from the sensor system while in operation. The microcontroller is configured to provide control signals in response to the sensor signals. The multichannel vestibular prosthesis also includes a neuroelectronic interface integrated circuit configured to communicate with the microcontroller to receive the control signals, and a plurality of electrodes electrically connected to the neuroelectronic interface integrated circuit. The neuroelectronic interface integrated circuit includes a digital controller configured to communicate with the microcontroller, a plurality of digital-to-analog converters configured to communicate with the digital controller, and a plurality of analog current control circuits, each constructed to communicate with a respective one of the plurality of digital-to-analog converters. Each of the plurality of analog current control circuits can be electrically connected directly or under software control to a respective one of a plurality of electrodes for delivering electrical stimuli to at least one vestibular nerve, and the digital controller is configured to control amplitudes, frequencies, polarities and durations of currents to be delivered to any combination of the plurality of electrical leads.

High-voltage CMOS neuroelectronic interface for a multichannel vestibular prosthesis

An avalanche photodiode is disclosed. The avalanche photodiode includes a substrate of a first conductivity type. A first well of a second conductivity type is formed within the substrate. A second well of the second conductivity type is formed substantially overlying and extending into the first well. A heavily doped region of the first conductivity type is formed substantially overlying and extending into the first well, the junction between the heavily doped region and the second well forming an avalanche multiplication region. A guard ring is formed from a first conductivity material positioned substantially about the periphery of the multiplication region at least partially underlying the heavily doped region. An outer well ring of the second conductivity type is formed about the perimeter of the deep well and the guard ring.

Deep submicron and nano CMOS single photon photodetector pixel with event based circuits for readout data-rate reduction communication system

A low-power differential optical receiver useful for high-speed optical communication between CMOS chips includes a multi-stage differential amplifier circuit including a first differential transimpedance stage ( ) followed by a plurality of differential feed-forward, high-bandwidth gain stages ( ) and a final, differential-to-single-ended converter output stage ( ). The inputs of the transimpedance stage receive input signals from a MSM or PIN diode photo-detector. Transistors having plural, different threshold levels are employed within each differential amplifier stage to reduce the size of the footprint of the circuit and improve the gain and bandwidth while decreasing the parasitic capacitance. The optical receiver is fabricated on a silicon on insulator chip, such as in an ultra-thin silicon on sapphire CMOS process which enables the design of high speed circuits with low power consumption and no substrate cross-talk. The circuit design is well-suited for use in a multi-dimensional array of optical interconnects between CMOS chips or platforms.

Low-power, differential optical receiver in silicon on insulator

An integrated electronic-optoelectronic module comprising: an ultrathin silicon-on-sapphire composite substrate; at least one electronic device fabricated in the ultrathin silicon; and at least one optoelectronic device bonded to the ultrathin silicon-on-sapphire composite substrate and in electrical communication with the at least one electronic device fabricated in the ultrathin silicon layer. For example, VCSELs and photodetectors are integrated with CMOS electronic circuitry to provide useful modules for electro-optical interconnects for computing and switching systems.

Integrated electronic-optoelectronic devices and method of making the same

A two transistor current-controlled current conveyor (C4) circuit is provided which exploits the translinear properties of the MOS transistor in subthreshold and uses unidirectional current signals. As a result, the circuits of the invention achieve high functionality and integration density with very low power dissipation. Two C4 circuits connected to and communicating through a bidirectional junction circuit of the invention permit the transmission of independent, bidirectional signals. These circuits are useful for implementing synthetic neural systems such as associative memories and silicon retinas, such as winner-takes-all and pyramidal neuron circuits and the outer-plexiform layer of a retina.

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Baltimore, MD, United States of America

Andreas G Andreou