Siemens Aktiengesellschaft

Infineon Technologies Ag

Andreas Foglar

Peter Rau

Raimar Thudt

Friedrich Geissler

Matthias Heink

Sören Sonntag

Oliver Von Soosten

Michael Gerling

Martin Erdmann

Herbert Schneider

Franz-Josef Schaefer

Router IP port for an IP router of a IP network system, wherein the router IP port comprises: an encapsulating unit for encapsulating IP data packets received from an IP sub-network to generate Ethernet data packets which are forwarded to an Ethernet unit of said IP router; a decapsulating unit for decapsulating Ethernet data packets received from said Ethernet unit to extract IP data packets to be forwarded; an Egress filter unit for filtering the decapsulated IP data packets extracted by said decapsulating unit in response to a match signal which is generated by an Egress comparison unit which compares a hierarchical destination address prefix of said decapsulated IP data packets logically with configuration data stored in a local memory of said router port.

Router IP port for an IP router

An ATM-port module for an ATM-node having an Ethernet switch includes an ATM-controller; and an Ethernet-switch interface connecting it to the Ethernet switch. The switch has an Ethernet encapsulating-unit for encapsulating ATM cells processes by the ATM-controller into packets for transmission to the switch, and an Ethernet decapsulating-unit for extracting ATM cells from packets received from the switch. The module further includes a segmentation-and-reassembly unit; and a buffering-and-scheduling unit. The buffering-and-scheduling unit provides a processed enlarged-ATM-cell to the encapsulating-unit when an indication flag indicates that an ATM port is a destination port of the enlarged ATM-cell; and a processed enlarged-ATM-cell to the segmentation-and-reassembly unit when an indication flag indicates that an Ethernet port is the enlarged ATM-cell's destination port.

ATM-port with integrated ethernet switch interface

A method is described, by which sets of values representing various parameters can be allocated to addresses, at which addresses data pertaining to the various value sets can be stored in memory. The method described is characterized in that the allocated addresses are each formed by a concatenation of address components representing the individual values of a given set of values, and the scope of the various address components and/or the order of the various address components in their concatenation can be varied individually as a function of configuration parameters that have an influence on the ranges of values of the parameters.

Method by which sets of values representing various parameters can be allocated to addresses

In an apparatus and a method for communication between sending and/or receiving stations and a transfer station, data that are supplied from the sending stations to the transfer station are intended to be carried to receiving stations. The transfer station takes over the data supplied to it and carries the data directly or indirectly to a particular desired receiving station. A quantity of data taken over and/or to be taken over into the transfer station is determined, and the takeover of data from one or more sending stations to the transfer station can be interrupted selectively as a function of the result of determination.

Apparatus and method for communication between sending and/or receiving

A method and an apparatus for adapting a transmission bit rate of each individual one of a plurality of connections to an available bit rate capacity in a data multiplexer operating according to an asynchronous transfer mode includes storage in memory of a total available bit rate for all of the connections. An actual bit rate of all of the connections together is continuously ascertained. A difference between the available bit rate and the actual bit rate is continuously calculated. A number of those connections without underloading is continuously ascertained. A continuous recursive calculation of a current fair share value from the former fair share value, of a number of connections without underloading, and of a difference between the available and the actual bit rate, is performed. The fair share value is written in resource management cells, if the current fair share value is less than the value already contained in the resource management cells. The transmission bit rate of each individual connection is adjusted in accordance with the value in the various resource management cells.

Method and apparatus for adapting a transmission bit rate of a data

A method and circuit arrangement for transmitting message cells via redundant virtual path pairs of an ATM communication network is provided. Two alternative solutions are employed for the transmission of message cells via virtual path pairs respectively formed of an active path and of an alternate path. A first solution is that the message cells transmitted via the active path and via the alternate path of a path pair are conducted up to the output of the switching network lying at the end of the corresponding path pair. Dependent on the number of message cells arriving via the active path and via the alternate path, a forwarding of the message cells of the active path or of the alternate path occurs proceeding from this point. The second solution is that the message cells of the alternate path are first discarded at the input of the corresponding switching network. Given an interruption of the active path, which is indicated to the switching network by an interrupt signal, by contrast the message cells arriving via the alternate path are forwarded by the switching network.

Method and circuit arrangement for transmitting message cells via

For transmitting message cells via virtual path pairs respectively formed of two separate paths (AP, EP), it is provided that a separate, internal cell header for each of the paths of a path pair is placed in front of every accepted message cell at least by a switching network (CCa) located at the beginning of the respective path pair. These internal cell headers have a plurality of header parts corresponding in number to the plurality of switching stages of the respective switching network. Given the appearance of a message cell, the header parts of the internal cell headers that are allocated to one another and that are intended for the respective switching stage are compared to one another by each of the switching stages of the respective switching network (CCa). Based on the criterion of the result of the comparison, the associated message cell is then either forwarded unmodified or is duplicated. The two message cells resulting therefrom are then forward via separate routes within the respective switching network in conformity with the header parts of the two internal cell headers that come into consideration.

Method for transmitting message cells via redundant virtual path pairs

A check of the observance of prescribed transmission bit rates in an ATM switching equipment occurs using counter devices (RAM1, ALU) working according to the 'leaky bucket' principle. These are individually allocated to virtual connections via the switching equipment (VA). The momentary counter readings of these counter devices are respectively decremented by a variable count value only upon arrival of a message cell of the respective virtual connection. This variable count value is proportional to the time difference between the arrival time of the respective message cell and the arrival time of the message cell of the same virtual connection that immediately preceded it. The transmission bit rates determined for the virtual connections are thereby allocated to defined bit rates classes. On the basis of this allocation, an individual proportionality factor that is utilized for the duration of the existence of the respective virtual connection for the calculation of the variable count value is calculated for each of the virtual connections on the basis of this allocation.

Method and arrangement for checking the observance of prescribed

For reducing the loss of message packets that are transmitted according to an asynchronous transfer mode during the course of virtual connections and which comprise a packet header identifying the respective virtual connection and that are respectively augmented by a sequential auxiliary identifier and that, after multiplication, or transmitted separately via redundant switching matrices of a packet switching equipment, message packets that follow a respective faulty-transmitted message packet are intermediately stored, and that, following the transmission of an error-free message packet which corresponds to the respective faulty-transmitted message packet via a switching matrix that respectively transmits more slowly, the intermediately-stored message packets are forwarded in rapid succession.

Method and circuit arrangement for reducing the loss of message packets

In order to reduce the loss of message packets that are transmitted in the course of virtual connections in an asynchronous transfer mode and which comprise a packet header identifying the respective virtual connection, the message packets being respectively augmented by a continuous auxiliary identifier and, after multiplication, being separately transmitted via redundant switching matrices of a packet switching equipment, it is provided that, with reference to the auxiliary identifier, only that message packet transmitted without fault as a first of the multiplied message packets and having an auxiliary identifier that is the next one following the most recently-transmitted message packet is forwarded. In addition, that switching matrix by way of which the transmission of message packets respectively occurs most slowly is identified and message packets that are transmitted via the respective slowest switching matrix as the first of the multiplied message packets are forwarded.

For the establishment of vertual connections passing through switching matrices of a multi-stage switching system, it is provided that upon the arrival of a call packet requesting the establishment of a virtual connection, a central control device identifies all the switching matrices involved in the connection to be established and determines setup information that must be assigned to each of them in order to establish the connection. This setup information is fed to the individual switching matrices from the central control device in a setup packet along the path of the virtual connection to be established.

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Munich, Germany

Andreas Foglar