Dallas Semiconductor Corporation

Other

Andreas Curiger

Wendell L Little

Stephen N Grider

Bradley M Harrington

James E Bartling

David A Bunsey

Shyun Liu

Matthew K Adams

An electronic module having at least a microprocessor and co-processor on a single integrated circuit. The electronic module can be contained in a small housing. The electronic module provides secure bidirectional data communication via a data bus. The electronic module may include an integrated circuit comprising a microprocessor, and a co-processor adapted to handle 1,024-bit modulo mathematics primarily aimed at RSA calculations. The electronic module is preferably contained in a small token sized metallic container and will preferably communicate via a single wire data bus which uses a one-wire protocol.

Parasitically powered microprocessor capable of transmitting data over a single data line and ground

An integrated circuit, such as a microprocessor, which incorporates hardware mechanisms to prevent the circuitry from operating outside the proper bounds of design. The hardware circuitry prevents the microprocessor circuitry from being forced to operate at clock speeds that are greater than it is designed for, from operating at temperatures above or below that which it is designed for, and from being forced to operate at voltages that are above or below voltages that the microprocessor is designed to operate at.

Integrated circuit having hardware circuitry to prevent electrical or thermal stressing of the silicon circuitry

Microprocessor with coprocessing capabilities for secure transactions and quick clearing capabilities

Circuitry which performs modular mathematics to solve the equation C=M.sup.k mod n and n is performed in a manner to mask the exponent k's signature from timing or power monitoring attacks. The modular exponentation function is performed in a normalized manner such that binary ones and zeros in the exponent are calculated by being modulo-squared and modulo-multiplied.

Method and apparatus for masking modulo exponentiation calculations in

A processor system is disclosed wherein said processor system is adapted to communicate over at least one one-wire network utilizing one-wire communications protocol. For the embodiment of the invention in which the processor system acts as a network master, the processor system includes a master UART especially configured to control communications over such network according to one-wire protocol. For the embodiment of the invention in which the processor communicates over two one-wire networks, the processor system includes a first UART which acts as a slave and a second UART which acts as a master.

Universal asynchronous receiver/transmitter (UART) slave device

An electronic module having at least a microprocessor and co-processor on a single integrated circuit. The electronic module can be contained in a small housing. The electronic module provides secure bidirectional data communication via a data bus. The electronic module may include integrated circuit comprising a microprocessor, and a co-processor adapted to handle 1,024-bit modulo mathematics primarily aimed at RSA calculations. The electronic module is preferably contained in a small token sized metallic container and will preferably communicate via a single wire data bus which uses a one-wire protocol.

Growing community of inventors

Dallas, TX, United States of America

Andreas Curiger