Analog Devices International Unlimited Company

Analog Devices,inc.

Analog Devices Global

Analog Devices Global Unlimited Company

Andreas Callanan

Colin Gerard Lyden

Gabriel Banarie

Damien Joseph McCartney

Shaun Bradley

Adrian Sherry

Jeremy Richard Gorbold

Thomas J Meany

Bernard Sherwin Leung Chiw

Colin McIntosh

Paul Joseph Maher

Pat Crowe

Shaun Stephen Bradley

A technique for providing error detection during simplex serial data transmission, as well as associated methods and systems, are disclosed. The technique is based on a readback of the serially transmitted data on the external single wire bus. The readback data is internally processed and compared to the intended transmission data. An error is flagged where the intended and the actual data are not the same. One advantage of this technique is that it can be wrapped around an existing SENT hardware, thereby improving diagnostic coverage while not affecting the SENT protocol implementation itself.

Enhanced safety mechanism for single wire interface

A memory device comprising a memory array including memory cells to store memory data, error correcting code (ECC) circuitry configured to generate ECC data and use the ECC data to detect errors in the memory data, and an ECC circuitry checker. The ECC circuitry checker is configured to substitute the ECC data with check ECC data, compare an output of the ECC circuitry to an expected output when the substituted check ECC data is applied to the ECC circuitry, and generate an alert when the comparing indicates an error in the ECC circuitry.

Error correction code validation

A status of one or more components of a battery monitor circuit can be evaluated, such as to validate operation of the monitor circuit. In an example, a battery monitor circuit can be evaluated by providing a first test signal to a battery voltage measurement circuit that is coupled to a battery. A first analog-to-digital converter (ADC) circuit can be configured to receive a first voltage signal from the battery voltage measurement circuit in response to the first test signal. A processor circuit can be configured to validate the first ADC circuit by evaluating a correspondence between the first test signal and the received first voltage signal. One or more other ADC circuits in the battery monitor circuit can be validated by cross-checking measurement results with information from the first ADC circuit.

Battery SOH determination circuit

Described are various current measurement techniques that can compensate for drift in shunt resistance. Determining a resistance of a shunt resistor, e.g., coupled to a battery terminal, can include introducing a known signal in sync with the chop phases of a dual system chop scheme, chopping the known signal out in the main signal path, and explicitly extracting the known signal in a parallel, additional signal deprocessing path.

Current measurement techniques to compensate for shunt drift

Techniques to increase a data throughput rate of a filter circuit by preloading selectable memory circuits of the filter circuit with reference data, sampling input data at an input of the filter circuit, combining the sampled input data with the preloaded reference data, and generating a filter output based on the combined sampled input data and preloaded reference data.

Time interleaved filtering in analog-to-digital converters

Techniques to provide calibration of a measurement system in conjunction with measurement operations. The techniques may include providing a reference device in a signal processing chain within the measurement system. An excitation signal may be driven through the reference device while it may be connected to the signal processing chain within the measurement system and a calibration response may be captured. During a measurement operation, the reference device connection may be complemented with a sensor connection in the signal processing chain and the excitation signal may be driven through the signal processing chain. A measurement response may be captured from the system. The measurement system may generate a calibrated measurement signal that accounts for phase and/or amplitude errors within the system from the calibration response and the measurement response.

Techniques for calibrating measurement systems

A multi-channel analog to digital converter which facilitates calibration of the analog to digital converter and respective input channels to the analog to digital converter, and a method for calibrating the analog to digital converter. A multi-channel ADC () comprising an ADC circuit () for converting analog signals received on input channels CHto CHN to digital output signals comprises a primary offset storing register () and a primary gain storing register () for storing respective primary offset and gain correction codes which are applied to the digital output signals in a primary correcting circuit () for correcting for the offset and gain errors introduced by the ADC circuit (). A plurality of secondary offset storing registers () and a plurality of secondary gain storing registers () store respective secondary offset and gain correction codes which are applied to the digital output signals in a secondary correcting circuit () for correcting for offset and gain errors introduced by corresponding ones of the input channels CHto CHN.

MULTI-CHANNEL ANALOG TO DIGITAL CONVERTER WHICH FACILITATES CALIBRATION OF THE ANALOG TO DIGITAL CONVERTER AND RESPECTIVE INPUT CHANNELS TO THE ANALOG TO DIGITAL CONVERTER, AND A METHOD FOR CALIBRATING THE ANALOG TO DIGITAL CONVERTER

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Murroe, Ireland

Andreas Callanan