Infineon Technologies Ag

Infineon Technologies Austria Ag

Andreas Behrendt

Markus Zundel

Bernhard Winkler

Martin Zgaga

Sokratis Sgouridis

Kai-Alexander Schreiber

Walter Rieger

Ravi Keshav Joshi

Juergen Steinbrenner

Rudolf Zelsacher

Evelyn Napetschnig

Markus Beninger-Bina

Michael Sorger

Joerg Ortner

Uwe Schmalzbauer

Mark Harrison

Erwin Bacher

Holger Doepke

Sergey Ananiev

Johann Schmid

Johanna Schlaminger

Richard Gaisberger

Robert Hartl

Thomas Walter

Anita Satz

Peter Imrich

Reinhard Lindner

Mario Stanovnik

Dominic Thurmer

A semiconductor device includes a semiconductor substrate having a first main surface and a metal structure above the first main surface. The metal structure has a periphery region that includes a transition section along which the metal structure transitions from a first thickness to a second thickness less than the first thickness. A polymer-based insulating material contacts and covers at least the periphery region of the metal structure. A thickness of the polymer-based insulating material begins to increase on a first main surface of the metal structure that faces away from the semiconductor substrate and continues to increase in a direction towards the transition section. An average slope of a surface of the polymer-based insulating material which faces away from the semiconductor substrate, as measured with respect to the first main surface of the metal structure, is less than 60 degrees along the periphery region of the metal structure.

Semiconductor device with polymer-based insulating material and method of producing thereof

A semiconductor device and a method of producing the semiconductor device are described. The semiconductor device includes: a semiconductor substrate; a metallization layer over the semiconductor substrate; a plating over the metallization layer, the plating including NiP; a passivation over the metallization layer and laterally adjacent the plating such that a surface of the plating that faces away from the semiconductor substrate is uncovered by the passivation, wherein a seam is present along an interface between the passivation and the plating; and a structure that covers the seam along a periphery of the plating and delimits a bondable area for the plating. The structure extends from the periphery of the plating onto the passivation. The structure includes an imide having a curing temperature below a recrystallization temperature of the NiP or an oxide having a deposition temperature below the recrystallization temperature of the NiP.

Semiconductor device and method of producing a semiconductor device

Described herein is a method and a power semiconductor device produced by the method. The method includes: forming a structured metallization layer above a semiconductor substrate; forming a protective layer on the structured metallization layer; forming a first passivation over the structured metallization layer with the protective layer interposed between the first passivation and the structured metallization layer; structuring the first passivation to expose one or more regions of the protective layer; removing the one or more exposed regions of the protective layer to expose one or more parts of the structured metallization layer; and after structuring the first passivation and removing the one or more exposed regions of the protective layer, forming a second passivation on the first passivation and electroless plating the one or more exposed parts of the structured metallization layer.

Passivation structuring and plating for semiconductor devices

A method for producing at least one cavity within a semiconductor substrate includes dry etching the semiconductor substrate from a surface of the semiconductor substrate at at least one intended cavity location in order to obtain at least one provisional cavity. The method includes depositing a protective material with regard to a subsequent wet-etching process at the surface of the semiconductor substrate and at cavity surfaces of the at least one provisional cavity. Furthermore, the method includes removing the protective material at least at a section of a bottom of the at least one provisional cavity in order to expose the semiconductor substrate. This is followed by electrochemically etching the semiconductor substrate at the exposed section of the bottom of the at least one provisional cavity. A method for producing a micromechanical sensor system in which this type of cavity formation is used and a corresponding MEMS are also disclosed.

Methods for producing a cavity within a semiconductor substrate

Devices and methods are provided where photoresist is applied on a substrate and at least some regions of the photoresist are dried prior to removing a substrate from a substrate support.

Photoresist application

A semiconductor component comprises a semiconductor body with at least one protective trench in the semiconductor body. An insulation layer is situated at least at the bottom of the protective trench. An electrically conductive layer having a thickness D is formed on the insulation layer in the protective trench, wherein the electrically conductive layer only partly fills the protective trench.

Semiconductor component and method for producing a semiconductor component

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Villach, Austria

Andreas Behrendt