Plessey Semiconductors Limited

Meta Platforms, Inc.

Andrea Pinos

Samir Mezouari

Wei Sin Tan

John Lyle Whiteman

Xiang Yu

Jun-Youn Kim

Weisin Tan

Simon Ashton

Kathleen Bonnie Vinden

WeiSin Tan

Jonathan Shipp

Sean Denis Connor

A method of forming an optical device, the method comprising the steps of forming spacers on the substantially vertical sidewalls of a sacrificial mesa, the spacers being formed from a first electrically insulating, optically transparent material, and having an internal face contacting the mesa, and a second opposing external face; depositing a reflective, electrically conducting material so as to form a mirror layer on the external face of the spacers; removing the sacrificial mesa so as to form a pocket between the internal faces of the spacers; installing a die having substantially vertical sidewalls into the pocket between the internal faces of the spacers.

Spacer micro-LED architecture for microdisplay applications

A micro-light emitting diode (micro-LED) device includes a plurality of semiconductor epitaxial layers that includes a quantum well layer configured to emit light. The micro-LED device also includes an array of electrodes for an array of micro-LEDs, the array of electrodes coupled to the plurality of semiconductor epitaxial layers. The micro-LED device further includes an insulator grid coupled to the plurality of semiconductor epitaxial layers and positioned in regions between individual electrodes of the array of electrodes, and a gate grid coupled to the insulator grid and configured to apply an electric field through the insulator grid to the plurality of semiconductor epitaxial layers in the regions between the individual electrodes of the array of electrodes to electrically isolate the plurality of semiconductor epitaxial layers into individual micro-LEDs of the array of micro-LEDs.

Micro-LED with field-effect isolation

A light emitting diode structure comprising: a p-type region; an n-type region; a gate contact; a first light emitting region for recombination of carriers injectable by the p-type region and the n-type region; and a second light emitting region for recombination of carriers injectable by the p-type region and the n-type region, wherein the first light emitting region and the second light emitting region at least partially overlap to form a light emitting surface associated with the first light emitting region and the second light emitting region; wherein the p-type region is at least partially formed in a first channel through the first light emitting region and the second light emitting region, and the n-type region is at least partially formed in a second channel through the first light emitting region and the second light emitting region, wherein the light emitting device is configured such that the wavelength of light emitted by the light emitting surface is controllable by varying a gate voltage applied to one of the p-type and n-type regions by the gate contact thereby to alter carrier injection by the p-type and n-type regions into the first and second light emitting regions.

Voltage-controllable monolithic native RGB arrays

A light emitting diode structure comprising: a p-type region; an n-type region; a light emitting region for recombination of carriers injectable by the p-type region and the n-type region; and a via passing through the light emitting region, wherein the via defines the perimeter of a light emitting surface of at least one pixel and comprises a material configured to enable injection of carriers into the p-type region or the n-type region, wherein one of the p-type region and n-type region is configured such that carriers generated in the one of the p-type region and the n-type region diffuses through the other one of the n-type region and the p-type region prior to recombination in the light emitting region.

High resolution monolithic RGB arrays

A method of forming a strain relaxation layer in an epitaxial crystalline structure, the method comprising: providing a crystalline template layer comprising a material with a first natural relaxed in-plane lattice parameter; forming a first epitaxial crystalline layer on the crystalline template layer, wherein the first epitaxial crystalline layer has an initial electrical conductivity that is higher than the electrical conductivity of the crystalline template layer; forming a second epitaxial crystalline layer on the first epitaxial crystalline layer, wherein the second epitaxial crystalline layer has an electrical conductivity lower than the initial electrical conductivity of the first epitaxial crystalline layer and comprises a material with a second natural relaxed in-plane lattice parameter that is different to the first natural relaxed in-plane lattice parameter of the crystalline template layer; forming pores in the first epitaxial crystalline layer by electrochemical etching of the first epitaxial crystalline layer to enable strain relaxation in the second epitaxial crystalline layer by plastic deformation of bonds in the first epitaxial crystalline layer and/or at the interface between the first epitaxial crystalline layer and the second epitaxial crystalline layer; and forming one or more channels comprising a conductive material through at least the first epitaxial crystalline layer and the second epitaxial crystalline layer thereby to enable electrical connection to the crystalline template layer through the first epitaxial crystalline layer and the second epitaxial crystalline layer.

Strain relaxation layer

A method of forming a light emitting structure, the light emitting structure comprising: a first light emitting region configured to emit light having a first primary peak wavelength; a second light emitting region configured to emit light having a second primary peak wavelength, wherein the first primary peak wavelength is different to the second primary peak wavelength; and a partially reflective layer positioned at least partially between the first light emitting region and the second light emitting region, wherein the partially reflective layer is configured to reflect light having the first primary peak wavelength emitted by the first light emitting region and allow light having the second primary peak wavelength emitted by the second light emitting region to pass through the partially reflective layer.

Multicolour light emitting structure

Disclosed herein are a light source for a display system and methods of fabricating the light source. The light source includes a backplane wafer including a first bonding layer that includes an array of pixel contact pads in a first dielectric layer; a second bonding layer including an array of small metal contact pads in a second dielectric layer; and an array of mesa structures on the second bonding layer and configured to emit light. The second dielectric layer is bonded to the first dielectric layer such that each pixel contact pad of the array of pixel contact pads is in contact with two or more small metal contact pads that are electrically coupled to a same mesa structure of the array of mesa structures.

Alignment-free micro-display architecture

A Light Emitting Diode (LED) precursor comprising a first semiconducting layer, and a monolithic LED structure provided on a growth surface of the first semiconducting layer is provided. The first semiconducting layer includes a mesa structure extending from a major surface of the first semiconducting layer. The first semiconducting layer comprises a first semiconducting sublayer having a first in-plane lattice constant, and a strain-relaxed sublayer. The strain relaxed sublayer comprises a Group III-nitride provided across the first semiconducting sublayer, wherein the strain relaxed sublayer provides the mesa surface of the mesa structure, such that the mesa surface has a second in-plane lattice constant which is larger than the first in-plane lattice constant. The monolithic LED structure is provided such that the monolithic LED structure covers the mesa surface.

LED precursor incorporating strain relaxing structure

A light source comprises a backplane wafer with electrical circuits fabricated thereon, and an array of LEDs coupled to the backplane wafer. Each LED of the array of LEDs comprises a mesa structure including semiconductor epitaxial layers and characterized by inwardly tilted mesa sidewalls, a high-refractive index material region (e.g., with a refractive index greater than about 1.75, such as equal to or greater than a refractive index of the semiconductor epitaxial layers) surrounding the semiconductor epitaxial layers of the mesa structure and including outwardly tilted sidewalls, and a reflective layer on the outwardly tilted sidewalls of the high-refractive index material region. In one example, each LED of the array of LEDs also include a passivation layer on the inwardly tilted mesa sidewalls of the mesa structure.

Microdisplay architecture with light extraction efficiency enhancement

A method of forming a Light Emitting Diode (LED) precursor comprising: forming a first semiconducting layer comprising a Group III-nitride on a substrate, selectively removing a portion of the first semiconducting layer to form a mesa structure, and forming a monolithic LED structure. According to the method, the first semiconducting layer has a growth surface on an opposite side of the first semiconducting layer to the substrate. According to the method, the first semiconducting layer is selectively removed to form the mesa structure such that the growth surface of the first semiconducting layer comprises a mesa surface and a bulk semiconducting surface. Further, the monolithic LED structure is formed on the growth surface of the first semiconducting layer such that the monolithic LED structure covers the mesa surface and the bulk semiconducting surface, the monolithic LED structure comprising a plurality of layers, each layer comprising a Group III-nitride, including a second semiconducting layer, an active layer provided on the second semiconducting layer, the active layer configured to generate light, and a p-type semiconducting layer provided on the active layer. A potential barrier is provided between a first portion of the p-type semiconducting layer covering the mesa surface and a second portion of the p-type semiconducting layer covering the bulk semiconducting surface. The potential barrier surrounds the first portion of the p-type semiconducting layer covering the mesa surface.

Light Emitting Diode and method of forming a Light Emitting Diode

A Light Emitting Diode (LED) array precursor is provided. The LED array precursor comprises a substrate having a substrate surface, a first LED stack, a p++ layer, a n++ layer and a second LED stack. The first LED stack is provided on a first portion of the substrate surface. The first LED stack comprises a plurality of first Group III-nitride layers defining a first semiconductor junction configured to output light having a first wavelength wherein a n-type side of the first semiconductor junction is orientated towards the substrate surface. The p++ layer is provided on the first LED stack, the p++ layer comprising a Group III-nitride. The n++ layer has a first portion covering the p++ layer of the first LED stack and a second portion covering a second portion of the substrate surface, wherein a tunnel junction is formed at an interface between the n++ layer and the p++ layer, the n++ layer comprising a Group III-nitride. The second LED stack is provided on the second portion of the n++ layer covering the second portion of the substrate surface. The second LED stack comprises a plurality of second Group III-nitride layers defining a second semiconductor junction configured to output light having a second wavelength different to the first wavelength, wherein a n-type side of the semiconductor junction is provided towards the n++ layer. A method of manufacturing a LED array precursor is also provided.

LED array and method of forming a LED array

A light emitting diode includes an n-type semiconductor layer including a pit structure formed therein, active layers grown only on sidewalls of the pit structure and configured to emit light, and a p-type semiconductor layer on the active layers and at least partially in the pit structure. In one embodiment, the pit structure is characterized by a shape of an inverted pyramid. The pit structure is formed in the n-type semiconductor layer by, for example, etching the n-type semiconductor layer using an etch mask layer having apertures with slanted sidewalls, or growing the n-type semiconductor layer on a substrate through a mask layer having an array of apertures.

Semipolar micro-LED

The present invention provides a monolithic LED array precursor comprising a plurality of LED structures, an LED device comprising the monolithic LED array, and a method of manufacture thereof. In particular, the present disclosure provides a monolithic LED array having improved light emission.

Monolithic LED array and a precursor thereto

An active matrix LED array precursor forming a precursor to a micro LED array is provided. The active matrix LED array precursor comprises a common first semiconducting layer comprising a substantially undoped Group III-nitride, a plurality of transistor-driven LED precursors, and a common source contact. Each transistor-driven LED precursor comprises a monolithic light emitting diode (LED) structure comprising a plurality of III-nitride semiconducting layers, a barrier semiconducting layer, and a gate contact. Each monolithic LED structure is formed on a portion of the common semiconducting layer. The barrier semiconducting is layer formed on a portion of the common semiconducting layer encircling the LED structure and configured to induce a two-dimensional electron channel layer at the interface between the common semiconducting layer and the barrier semiconducting layer. The gate contact is formed over a portion of the two-dimensional electron channel layer, the gate contact encircling the LED structure. The common source contact is configured to form an ohmic contact to each portion of the two-dimensional electron channel layer such that a high electron mobility transistor is provided between the common source contact and each monolithic LED structure for driving each LED structure.

Active matrix LED array

A light source includes an array of micro-light emitting diodes (micro-LEDs), an array of micro-lenses, and a bonding layer bonding the array of micro-lenses to the array of micro-LEDs. Each micro-LED of the array of micro-LEDs includes a first mesa structure formed in a plurality of semiconductor layers. The array of micro-lenses is bonded to a first semiconductor layer of the plurality of semiconductor layers by the bonding layer. The first semiconductor layer includes an array of second mesa structures formed therein. The first mesa structure and the second mesa structure are on opposite sides of the plurality of semiconductor layers. Each second mesa structure of the array of second mesa structures is aligned with a respective micro-lens of the array of micro-lenses and the first mesa structure of a respective micro-LED of the array of micro-LEDs.

Growing community of inventors

Plymouth, United Kingdom

Andrea Pinos