Infineon Technologies Ag

Andre Sch&auml;fer

Hermann Ruckerbauer

Joachim Schnabel

Andrea Zuckerst&auml;tter

A memory device has a memory module, a controller, a data bus for connecting the controller and the memory module, a read clock generator, and a read clock bus for connecting the read clock generator, the memory module, and the Controller. The data bus read data from the memory module or writes data into the memory module. The read clock generator is disposed in the memory module, so that the data bus and the read clock bus are substantially symmetric, and generate a read clock for transferring data from the memory module to the controller. The data bus and the read clock bus are configured with respect to each other such that substantially no time delay between read data on the data bus and the read clock on the read clock bus exists at the controller.

Memory device

A memory device includes a memory module, a control unit and a bus connected to the memory module and the control unit. In an accessing operation of the memory module via bus, the control unit applies a first command which causes high power consumption in the memory module, to the memory module via part of the bus only.

Memory device and method of accessing a memory device

A circuit configuration for converting logic signal levels has two level converters, to which an input signal to be converted is fed complementarily. The level converters generate a rising or falling edge with a different gradient. The output signals of the level converters are combined in a logic combination element. The logic combination element drives a togglable storage element, which provides the level-converted output signal. The duty ratio of the input signal is not changed during the level conversion, independently of production-dictated variations in the component parameters.

Logic signal level converter circuit and memory data output buffer using the same

An integrated circuit for receiving a clock signal is described and has a clock input and a receiver circuit. A clock signal can be applied to the clock input. A filter circuit is provided, whose input is connected to the clock input for the purpose of filtering out a frequency and/or a frequency range of the clock signal. An output of the filter circuit, which output produces the filtered clock signal, is connected to the receiver circuit for the purpose of transferring the filtered clock signal to the integrated circuit for processing.

Integrated circuit for receiving a clock signal, particularly for a semiconductor memory circuit

The invention relates to a method and to an input circuit for evaluating a data item in a data signal at an input of a memory component. The data signal is integrated between a start time and an end time that are specified by a control signal. An integration period between the start time and the end time depends on the frequency of the data signal. The data item is assigned a logic data value based on the result of the integration. The input circuit has a comparator device, an integration device and a switching device. The data signal is first integrated in order to obtain an integration value. The comparator device compares the integration value with a prescribed threshold value. A logic data value is assigned to the data item based on the result of the comparison.

Method and input circuit for evaluating a data signal at an input of a memory component

A circuit configuration prevents a transfer of interference signals present on an input line to a processing section. Electrical input signals are evaluated in an analysis circuit which is connected in parallel with the actual reception circuit in a protection device. If an interference signal is present, a transfer circuit is controlled such that a transfer to the processing section is prevented.

Circuit configuration

The circuit configuration, in particular a DRAM element, has a protection device for suppressing the formation and/or emission of a reflection signal caused by a received supply input signal. An active signal matching device is provided, with which it is possible to prevent the formation of a reflection signal by using the input signal.

Growing community of inventors

München, Germany

Andre Schäfer

Growing community of inventors

München, Germany

Andre Sch&auml;fer

Andre Schäfer