Freescale Semiconductor,inc.

Nxp Usa, Inc.

Nxp B.v.

Andre Luis Vilas Boas

Alfredo Olmos

Stefano Pietri

Pedro Barbosa Zanetta

Chris C Dao

Richard Titov Lara Saez

Fabio De Lacerda

Ivan Carlos Ribeiro Nascimento

Fabio Duarte De Martin

Felipe Ricardo Clayton

Edgar Mauricio Camacho Galeano

Andre Gunther

Dale John McQuirk

Ivan Carlos Ribeiro Do Nascimento

Miten H Nagda

Marcos Mauricio Pelicia

Eduardo Ribeiro Da Silva

Michael Todd Berens

Ricardo Pureza Coimbra

Carl Culshaw

Sunny Gupta

Khoi Mai

Walter Luis Tercariol

Fernando Zampronho Neto

Javier Mauricio Olarte Gonzalez

Marcelo De Paula Campos

Jefferson Daniel De Barros Soldera

Jeffrey Alan Goswick

Edevaldo Pereira Silva, Jr

Vitor Moreira Gomes

Sandro A P Haddad

Ricardo Maltione

André L R Mansano

Richard Saez

Adriano Marques Pereira

Jose A Palazzi

Bruno Caceres Carrilho

Marcelo Fukui

Guilherme Godoi

An integrated circuit includes a plurality of analog inputs, and an analog multiplexer (MUX). The MUX includes a common output node configured to provide a MUX output, a plurality of analog switches, and a shared buffer. Each switch includes a corresponding bootstrap circuit coupled to a control electrode of a corresponding pass transistor in which the corresponding bootstrap circuit includes a corresponding boosting capacitor. Each analog switch of the plurality of analog switches has a first input coupled to a corresponding analog input of the plurality of analog inputs, a second input, and an output coupled to the common output node. The shared buffer has an input coupled to the common output node and coupled to provide a common buffered MUX output to the second input of each of the plurality of analog switches.

Integrated circuit (IC) having an analog multiplexer (MUX)

An integrated circuit including a comparator having a first input to receive a reference voltage, a second input, and an output to provide an under-voltage indicator. Sense points are configured to provide a plurality of sense point voltages, each sense point providing a corresponding sense point voltage of the plurality of sense point voltages; and a minimum voltage tracking circuit configured to receive the plurality of sense point voltages and provide an output voltage which tracks whichever sense point voltage of the plurality of sense point voltages is currently a minimum sense point voltage. The comparator receives the output voltage at the second input and asserts the under-voltage indicator when the output voltage is below the reference voltage.

Circuits and methods for tracking minimum voltage at multiple sense points

Multi-sense point voltage regulator systems are provided for usage in conjunction with power-regulated devices, such as system-on-chip and microcontroller unit devices. In embodiments, the multi-sense point voltage regulator system includes a multiplexer selector circuit and a voltage regulator. The multiplexer selector circuit is configured to: (i) monitor a local voltages at multiple sense points within an integrated circuit (IC) die circuit structure; and (ii) generate a feedback voltage indicative of a lowest one of the monitored local voltages. The voltage regulator is configured to generate a regulated power supply output voltage as a function of a differential between the feedback voltage and the reference voltage, with the regulated power supply output voltage provided to the IC die circuit structure to drive operation thereof.

Multi-sense point voltage regulator systems and power-regulated devices containing the same

An integrated circuit (IC) is disclosed that includes a load circuit, and a voltage regulator circuit configured to provide a load voltage and a load current to the load circuit. The voltage regulator circuit can regulate the load voltage based on the load current.

Capless voltage regulator with adaptative compensation

A current-controlled oscillator receives an input current. Ramp voltage generating circuitry generates first and second ramp voltages in response to the input current. Selecting circuitry selects one of the first and second ramp voltages depending on their relative values. Switching circuitry receives a selected ramp voltage, generates a signal based on the selected ramp voltage relative to a reference voltage, and outputs a clock signal. In one embodiment, a comparator receives the reference voltage, one of the first and second ramp voltages, and outputs a comparison signal. Logic circuitry controls the ramp voltage generating circuitry to output one of the ramp voltages during one half of a clock cycle and to output the other ramp voltage during another half cycle of the clock signal based on the comparison signal and logic states of the logic circuitry.

Current-controlled oscillator

An apparatus and method for synchronously discharging multiple capacitive loads. In one embodiment, the apparatus includes first and second discharge circuits for discharging first and second capacitive loads, respectively. The apparatus also includes a control circuit coupled to the first and second discharge circuits and configured to control the second discharge circuit. The control circuit includes a first scaler circuit configured to generate a first scaled voltage based on a first voltage on the first capacitive load, a second scaler circuit configured to generate a second scaled voltage based on a second voltage on the second capacitive load, and a comparator circuit for comparing the first and second scaled voltages. The comparator circuit asserts a control signal when the second scaled voltage exceeds the first scaled voltage. The second discharge circuit discharges the second capacitive load when the comparator circuit asserts its control signal.

System for synchronously discharging multiple capacitive loads

A voltage regulator circuit that regulates voltage on an output node that provides power to a load circuit having varying current draw. A feedback voltage from the output node is compared to reference voltages. In response to the comparisons, pull-up/down circuits are applied to a gate-control node connected to the gate of a pass transistor. The voltage of the gate-control node is adjusted by integrating current from the pull-up/down circuits. In response to the feedback voltage being between the first and second reference voltages, the voltage on the gate-control node is maintained by disabling the pull-up/down circuits at the gate-control node.

Voltage regulator

A voltage regulator includes first and second bias circuits, a transistor, and a load prediction circuit. The transistor has a first current electrode coupled to a first power supply voltage terminal, a second current electrode for providing a regulated output voltage, and a control electrode. The first biasing circuit is for providing a first bias voltage to the control electrode of the transistor in response to a feedback signal generated from the regulated output voltage. The second biasing circuit is for providing a second bias voltage to the control electrode of the transistor in response to a control signal. The load current prediction circuit is coupled to the second biasing circuit. The load prediction circuit is for providing the control signal to the second biasing circuit in response to determining that a load current at the second current electrode is expected to increase.

Voltage regulator with load current prediction and method therefor

An apparatus embodiment includes an integrated circuit (IC) and breach-detection circuitry. The IC includes data storage circuitry, a power grid configured to distribute power to the data storage circuitry, and a plurality of nodes distributed over at least one sensitive region of the IC. The breach-detection circuitry monitors power grid integrity at the at least one sensitive region of the IC and detects an event indicative of a breach by an external probe at a portion of the at least one sensitive region in response to floating node detection or a change in voltage at one of the plurality of nodes.

Breach detection in integrated circuits

A voltage regulator has an output driver current mirror circuit and one or more control circuits. The output driver current mirror circuit includes an output driver transistor, a tunable resistance circuit, and a diode-connected transistor. The output driver transistor has one current electrode coupled to a supply voltage and another current electrode coupled to an output terminal for providing the output voltage of the voltage regulator. The tunable resistance circuit has one terminal coupled to a control electrode of the output driver transistor, and another terminal coupled to a current electrode of the diode-connected transistor. The one or more control circuits includes a comparator for controlling a current provided to the output driver current mirror in response to a feedback signal from the output terminal.

Tunable voltage regulator circuit

A circuit includes first, second, and third power supply terminals. The circuit includes an input node coupled to receive a negative voltage and an output node coupled to provide a positive voltage proportional to the negative voltage. The circuit includes a voltage-to-current converter coupled to the first power supply terminal and the input node and configured to generate an intermediate current proportional to the negative voltage at the input node. The circuit also includes a current mirror coupled to the second power supply terminal and third power supply terminal and configured to mirror the intermediate current through a first resistor to provide the positive proportional voltage.

Feedback circuit and methods for negative charge pump

A sample and hold circuit including a charge path coupled to a voltage source. A first node of the charge path is located closer to the voltage source in the charge path than a second node of the charge path. The second node is coupled to an output of the sample and hold circuit to provide an output voltage. The sample and hold circuit includes a comparator circuit that compares the voltage of the first node and the voltage of the second node. When the comparator circuit determines that the voltage of the first node is a first condition with respect to a voltage of the second node, a voltage source provides a charging voltage on the first path to charge a first capacitor and a second capacitor to the charging voltage.

Sample and hold circuit

A circuit includes a first resistive element having a first terminal coupled to an input node to receive a negative voltage, a second resistive element having a first terminal coupled to a first power supply terminal, and a third resistive element having a first terminal coupled to the first power supply terminal. A first current mirror includes a first transistor coupled to a second terminal of the second resistive element and a second transistor coupled to a second terminal of the third resistive element and the first transistor, wherein the output node corresponds to the second terminal of the third resistive element. A second current mirror includes a third transistor coupled to the first transistor and a fourth transistor coupled to the second transistor, third transistor, and a second terminal of the first resistive element. The circuit converts the negative voltage to the positive proportion voltage.

Semiconductor devices for sensing voltages

Aspects of various embodiments of the present disclosure are directed to applications utilizing oscillator circuits. In certain embodiments, an apparatus includes an oscillator circuit having one or more capacitors. The oscillator circuit is configured to generate an oscillating signal by repeated charging and discharging of the capacitors. The apparatus also includes a control circuit connected to the oscillator. The control circuit is configured to set the oscillation frequency of the oscillator circuit as a non-linear function of an input control signal. For instance, in a more specific embodiment, the control circuit may be configured to set oscillation frequency of the oscillator circuit to a frequency scaled by a value raised to an exponent specified by the input control signal.

Oscillator circuit

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Campinas, Brazil

Andre Luis Vilas Boas