International Business Machines Corporation

Andre Hertwig

Michael V Koch

Matthias Ringe

Andreas Arp

Fatih Cilek

Disclosed aspects relate to a clock distribution network of a synchronous logic device. The synchronous logic device has sub-circuits having different clock domains. The clock domains form a hierarchical structure. The clock distribution network has a clock source to provide a global clock signal. A programmable delay line associated with a sub-circuit generates a local clock signal for the sub-circuit by delaying the signal. A global skew control circuit can manage clock skew between the local clock signals. The global skew control circuit may adjust a delay, determine initial operations for the delay lines, verify whether it is possible to perform the initial operations, and perform a correction operation. The correction operation can include correcting the control commands such that the corrected commands lead to the same change of skew adjustment between the local clocks.

Integrated skew control

An apparatus of performing a clock skew adjustment between N clock signals. 2(N&#x2212;1) skew sensors are configured as successive pairs k, each pair k having a first skew sensor and a second skew sensor. The first skew sensor receives a third clock signal obtained by delaying the first clock signal by a first delay and a fourth clock signal obtained by delaying the second clock signal by a second delay, and generates first information based on the third and fourth clock signals. The second skew sensor receives a fifth clock signal obtained by delaying the first clock signal by a third delay and a sixth clock signal obtained by delaying the second clock signal by a fourth delay, and generates second information based on the fifth and sixth clock signals. A skew controller performs the clock skew adjustment based on the first and second information.

Method and apparatus for clock skew control with low jitter in an integrated circuit

An apparatus of performing a clock skew adjustment between at least first and second clock signals includes first and second skew sensors and a skew controller. The first skew sensor receives a third clock signal obtained by delaying the first clock signal by a first delay and a fourth clock signal obtained by delaying the second clock signal by a second delay, and generates first information based on the third and fourth clock signals. The second skew sensor receives a fifth clock signal obtained by delaying the first clock signal by a third delay and a sixth clock signal obtained by delaying the second clock signal by a fourth delay, and generates second information based on the fifth and sixth clock signals. Each of the first and second information varies depending on the clock skew. The skew controller performs the clock skew adjustment based on the first and second information.

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Waldenbuch, Germany

Andre Hertwig