Alcatel Telspace

Alcatel Transmission Par Faisceaux Hertziens

Alcatel Transmission Par Faisceaux Hertziens A.t.f.h.

Andre Bazet

Philippe Sadot

Marc Darmon

Oliver Urbaniak

Pascal Brelivet

A device for initializing a Viterbi decoder in a receiver for signals transmitted in the form of bursts, each burst comprising a synchronization word and message data that has undergone convolutional coding in a transmitter, the position of the message data relative to the synchronization word being known, includes a detector for detecting the synchronization word, a multiplexer for applying the received signals to the Viterbi decoder in the presence of the message data and for applying to the Viterbi decoder, immediately before and immediately after the message data, a code sequence generated locally, free of errors and having a length at least equal to the truncation length of the Viterbi decoder.

Device for initializing a viterbi decoder in a receiver for signals

A method and apparatus for sequential decoding using the stack algorithm. A stack is used which is small in size and which has a leaky bottom. A counter stores the total count of nodes observed so as to abandon decoding if this count exceeds a fixed value. A comparator continuously compares the metric at the top of the stack with the largest metric lost from the bottom of the stack as stored in a memory. A small memory stores the path scanned through the logic tree, thereby directly providing the decoded block.

Method and apparatus for sequentially decoding a digital stream encoded

In a circuit for decoding convolutional codes for executing the survivor path storage and reverse scanning stage of a Viterbi algorithm, decoding consists in reverse scanning a plurality of paths of a trellis representing a diagram of the possible transitions resulting from encoding by an encoder comprising .nu. flip-flops, each node of the trellis being represented by a word on N=2.sup..nu. bits. The circuit selects from a plurality of possible survivor paths that which has the lowest metric, so as to reconstitute the trellis path actually determined by the encoding process and to recover the sequence of information bits that caused this path to be adopted. The circuit comprises a memory storing a plurality of said words of N=2.sup..nu. bits and, connected to the output of said memory, a cascade of .nu. groups of 2-in-1 multiplexers progressively combining the 2.sup..nu. outputs of the memory into a single output, a D flip-flop being provided at the output of each multiplexer. The final single flip-flop delivers sequentially the information bits representing the required path and the select signal of each multiplexer is the output signal of said final flip-flop.

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Clichy, France

Andre Bazet