Societe Anonyme De Telecommunications

Scholeman-Siemag Aktiengesellschaft

Andre A Aveneau

Xavier N Barbier

Guy A De Passoz

Time-division multiplex digital transmission system comprising two terminal stations and at least one intermediate station connected to one another by first and second multi-channel multiplex lines respectively corresponding to both data transmission directions, each digital channel of each multiplex line being allocated to a recurrent time-slot of a frame. Each intermediate station comprises means for transiting digital channels allocated to corresponding time-slots of multiplex lines and for extracting from one of multiplex lines to local lines of the intermediate station and for inserting from the local lines to other multiplex line digital channels allocated to corresponding time-slots according to the two transmission directions, and inversely. Each intermediate station comprises also one channel multiplexer and demultiplexer. The demultiplexer is adapted to extract and to transmit digital channels from the first or second multiplex line to given local lines respectively, when the multiplexer simultaneously inserts and transmits local channels from the given local lines to the second or first multiplex line, respectively.

Time-division multiplex digital transmission system with intermediate

A pulse stuffing demand generating device of the kind comprising means for comparing the phases of the write clock signals HDI and the read clock signals HDL of a buffer store in which are written and read multiplexed digital information, the said store having a capacity of n binary digits, wherein the said means comprise first means for comparing the phases of the rising edges of signals HDL and HDI, the said first means supplying a pulse stuffing demand signal when the rising edge of signal HDL is located in the 'one' portion of the HDI signal, and second means for supplying a signal authorizing the operation of the said first means, the said signal being supplied when one among n rising edges of the HDI signal is located in the 'zero' portion of a signal resulting from the division by n of the HDL signal and the duration of which is equal to one binary digit time slot.

Pulse stuffing demand generating device

The common return path of a circuit for applying pulses in alternating polarity to the balanced input transformer of a bipolar code signalling circuit is switched to block the first half and pass the last half of each pulse with a timing independent of polarity. The pulses supplied to the switched pulse-applying circuit have the same duration as the binary signal pulses from which they are derived, but these binary signal pulses are alternately supplied to the two sides of the pulse applying circuit by means of an AND-gate and a multivibrator. The same clock pulse generator times the multivibrator and the common path switching of the pulse-applying circuit. The circuit converts binary to bipolar signals free of asymmetric timing errors.

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Clamart, France

Andre A Aveneau