Telefonaktiebolaget Lm Ericsson (Publ)

Andras Vajda

Per Stenström

Ignacio Más Ivars

A method and a control node () for establishing network functions for processing data packets of a data flow from a delivering node () to a receiving node () over a communication network (). The control node identifies () flow characteristics relating to the data flow and determines () a succession of network functions () in the network for processing the data packets, based on the identified flow characteristics. The network functions () are then instructed (-) to forward the data packets in the data flow according to the determined succession. The sequence of network functions specifies a service chain. The controller uses OpenFlow. Network functions are dynamically relocated based on network conditions.

Method and control node for handling data packets

A method of operating a multi-core processor. In one embodiment, each processor core is provided with its own private cache and the device comprises or has access to a common memory, and the method comprises executing a processing thread on a selected first processor core, and implementing a normal access mode for executing an operation within a processing thread and comprising allocating sole responsibility for writing data to given blocks of said common memory, to respective processor cores. The method further comprises implementing a speculative execution mode switchable to override said normal access mode. This speculative execution mode comprises, upon identification of said operation within said processing thread, transferring responsibility for performing said operation to a plurality of second processor cores, and optionally performing said operation on the first processor core as well.

Multi-core memory model and speculative mode processor management

Method and scheduler in an operating system, for scheduling processing resources on a multi-core chip. The multi-core chip comprises a plurality of processor cores. The operating system is configured to schedule processing resources to an application to be executed on the multi-core chip. The method comprises allocating a plurality of processor cores to the application. Also, the method comprises switching off another processor core allocated to the application, not executing the sequential portion of the application, when a sequential portion of the application is executing on only one processor core. In addition, the method comprises increasing the frequency of the one processor core executing the application to the second frequency, such that the processing speed is increased more than predicted by Amdahl's law.

Method for executing sequential code on the scalable processor at increased frequency while switching off the non-scalable processor core of a multicore chip

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Sundsberg, Finland

Andras Vajda