Storage Computer Corporation

Andras Sarkozy

John O'Brien

James Valentino

Gregory Flynn

A protection mechanism for use in a mass storage system for providing user selectable levels of protection against data loss wherein storage segments of a plurality of disk drives are organized into at least two functionally separate logical units and a memory management mechanism is responsive to an identification of a logical unit as selected for mirroring by writing a first copy of a data block assigned to a first storage address in a designated logical unit into the assigned storage address in the designated logical unit and writing a second copy of the data block into a second storage address in the disk drives wherein the second storage address is skewed with respect to the first storage address so that the second storage address is located in a disk drive separate from the data disk drive containing the first storage address, and writing at least one parity block containing parity information relating to the data block into a disk drive. The mechanism allows a user to select to write data blocks to the disk drives without corresponding parity information being stored in the disk drives, and to later enter the parity information.

Apparatus and method for storing data with selectable data protection

Table Vectored Parity (TVP) of the present invention is a new method for the allocation of parity check information in multi disk storage systems. This technique permits an optional selection by the end user to store parity check information on a subset of any number of disks ranging from 1 to N, where there are N disks in the system.

Data storage system with dedicated allocation of parity storage and

A non-volatile cache mechanism connected to a bus connected for conducting write addresses and data from a host computer to mass storage devices and to a volatile cache wherein each write operation includes a write address and at least one data word. The non-volatile cache mechanism includes a non-volatile memory constructed of a plurality of sub-memories having overlapping read/write cycles for storing the data words, a cache control responsive to the write operations for writing the data words into the nonvolatile memory in parallel with receipt of the data words into the volatile cache, and a cache index for storing index entries relating write addresses of write operations on the bus with corresponding storage addresses of the data words in the non-volatile memory. The cache control is responsive to a write operation for reading the index entries to identify and select at least one available storage address in the non-volatile memory, generating at least one index entry relating the write address of the current write operation and the selected storage addresses in the non-volatile memory, and writing the data words into the non-volatile memory. The cache control is responsive to flush addresses to the volatile cache for indexing the cache index to identify cache entries corresponding to the flush addresses and invalidating the corresponding cache entries.

Non-volatile cache for providing data integrity in operation with a

A redundant disk computer system providing targeted data broadcast on the data bus to a plurality of devices on the data bus, such as computer central memory and a plurality of storage media disks (parity and data) under control of a real time operating system. Each of the plural disk storage media is each connected to the data bus with a corresponding enhanced disk adapted including a demand page memory of size sufficient to include a selected block of data and arranged to provide access to a selected portion of that data. The redundant array computer operating system provides the control and selected designation of the disk adapters as targeted receivers to read data 'broadcast' over the data bus, providing simultaneous transfer of data over the data bus. Each enhanced disk adapter further includes exclusive-OR logic thereon to provide direct calculation of parity from the newly received data and a subsequently received old data on a single subsequent data bus cycle. Thus, according to the present invention, the number of data bus data transfers is reduced and significant improvements in system performance is provided.

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Nashua, NH, United States of America

Andras Sarkozy