Intersil Americas Inc.

Gec Plessey Semiconductors, Inc.

Mitel Semiconductor Americas Inc.

Anatoly Aranovsky

Theodore D Rees

Provided herein are bi-directional buffers, and methods for providing bi-directional buffering. In an embodiment, a bi-directional buffer includes a differential input/differential output amplifier that includes a first input/output node and a second/input output node. The differential input/differential output amplifier is configurable in a first configuration and a second configuration. When in the first configuration, the second input/output node follows the first input/output node. When in the second configuration, the first input/output node follows the second input/output node.

Bi-directional buffer for open-drain or open-collector bus

A bi-directional buffer is connected between a first node and a second node, wherein the first node is connected by a first pull-up resistor to a first voltage supply rail, and the second node is connected by a second pull-up resistor to a second voltage supply rail. In an embodiment, the bi-directional buffer is enabled when a voltage of the first node does not exceed a first threshold voltage, and/or a voltage of the second node does not exceed a second threshold voltage. However, when the voltage of the first node exceeds the first threshold voltage, and the voltage of the second node exceeds the second threshold voltage, the bi-directional buffer is disabled, which disconnects the first and second nodes. This allows the first node to be pulled up to the first voltage supply rail, and the second node to be pulled up to the second voltage supply rail.

Bi-directional buffer with level shifting

Embodiments of the present invention are directed to current driver circuits and methods for driving a load. The current driver circuit includes a first transistor (Q) and a second transistor (Q) each having a gate, a drain and a source. The drain of the second transistor (Q) forms the output of the current driver circuit. The first and second transistors (Q) and (Q) function as a current mirror when the gates of the first and second transistors (Q) and (Q) are selectively connected together. The current driver circuit also includes a current source, a load mimic circuit, and a control loop (e.g., including an op-amp), which are configured to cause the voltage at the drain of the first transistor (Q) to substantially equal the voltage at the output of the current driver circuit.

Switched gate current driver

Write and read bias current control circuits are programmable through a control port. Both the read head bias DAC and the write DAC are controlled through a control port and both DACs use current as an input reference. The write and the read bias currents have constant reference current components which are set externally. The write and the read bias currents additionally have components which are a product of the reference current and a digital word loaded into an associated one of the DACs.

Current control circuit and method for programmable read write

A write driver control circuit controls the voltage level input to a switch circuit, providing increased range for head voltage swings and fast current switching, providing a write driver circuit with a variable voltage level which tracks the write current, as well as temperature and process variations, but which is independent of power supply voltages.

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Los Gatos, CA, United States of America

Anatoly Aranovsky