Massachusetts Institute of Technology

Massachusetts Eye and Ear Infirmary

Boston University

Khalifa University

Anantha P Chandrakasan

Chiraag Juvekar

Nachiket Venkappayya Desai

Utsav Banerjee

Muriel Medard

Vivienne Sze

Patrick Mercier

Vadim Gutnik

Ichiro Masaki

Konstantina Stankovic

James Robert Glass

Rafael Reif

Nisha Checka

Michael R Price

Berthold K Horn

Georgios Angelopoulos

Vladimir Marko Stojanovic

Hae-Seung Harry Lee

Michael Henderson Perrott

Masayuki Miyazaki

Yogesh Kumar Ramadass

Hari Balakrishnan

Dina Katabi

Saurav Bandyopadhyay

Charles G Sodini

Kerri Cahoy

Ruonan Han

Jerald Yoo

James T Kao

Shubham Chandak

Wendi Heinzelman

Lixin Shi

Haitham Zuhair Al-Hassanieh

Omid Salehi-Abari

Dina Reda El-Damak

Christian Alexander Haughwout

Sunghyuk Lee

Ezzeldin Hamed

Paul Serra

Muhammad Awais Bin Altaf

Marcus Yip

Andrew Lysaght

Abhinav Agarwal

Naveen Verma

Paul P Sotiriadis

Priyanka Raina

Johnna Dawn Powell

Long Yan

Jiarui Huang

Victor Huang

Marcelo M Mizuki

Ujjaval Desai

Shawn M Verbout

Ali Hossam Shoeb

James M Ooi

S Hamid Nawab

Jeffrey T Ludwig

Rui Jin

Femto-satellites are very small satellites that can be deployed in constellations from a larger mothership satellite for distributed measurement. They are too small to accommodate the GNSS receivers that many satellites use for navigation, but they can be located with an electromagnetic beam from the mothership satellite. The mothership satellite scans this beam across a constellation of femto-satellites. When the beam scans across a particular femto-satellite, the femto-satellite transmits an acknowledgement to the mothership satellite, e.g., by retroreflecting the beam or via a separate radio link. The beam can be modulated with commands for the femto-satellite, such as to make a measurement or transmit previously acquired data, as well with commands for determining the femto-satellite's location, such as a time stamp or beam pointing information. The femto-satellite can determine its location from the information modulated onto the beam or transmit the time stamp to the mothership satellite for localization.

Localizing, waking-up, and estimating direction of femto-satellites

A decoder includes a feature extraction circuit for calculating one or more feature vectors. An acoustic model circuit is coupled to receive one or more feature vectors from and assign one or more likelihood values to the one or more feature vectors. A memory architecture that utilizes on-chip state lattices and an off-chip memory for storing states of transition of the decoder is used to reduce reading and writing to the off-chip memory. The on-chip state lattice is populated with at least one of the states of transition stored in the off-chip memory. An on-chip word is generated from a snapshot from the on-chip state lattice. The on-chip state lattice and the on-chip word lattice act as an on-chip cache to reduce reading and writing to the off-chip memory.

Low-power automatic speech recognition device

Systems and methods for implementing confidential communications between nodes of a network provide reduced power consumption, require less memory, and provide improved security, relative to previously-known systems and method. Preferred embodiments implement protocol functions in hardware, as opposed to software, to yield some or all of the foregoing improvements. Some embodiments use a hashing circuit for multiple purposes, while maintaining its ability to compute successive intermediate hash values. Some embodiments improve security of systems using circuits configured to leverage a favorable data format.

Systems for providing secure communications using a protocol engine

Described is a lattice cryptography processor with configurable parameters. The lattice cryptography processor includes a sampling circuit configured to operate in accordance with a Secure Hash Algorithm 3 (SHA-3)-based pseudo-random number generator (PRNG), a single-port random access memory (RAM)-based number theoretic transform (NTT) memory architecture and a modular arithmetic unit. The described lattice cryptography processor is configured to be programmed with custom instructions for polynomial arithmetic and sampling. The configurable lattice cryptography processor may operate with lattice-based CCA-secure key encapsulation and a variety of different lattice-based protocols including, but not limited to: Frodo, NewHope, qTESLA, CRYSTALS-Kyber and CRYSTALS-Dilithium, achieving up to an order of magnitude improvement in performance and energy-efficiency compared to state-of-the-art hardware implementations.

Configurable lattice cryptography processor for the quantum-secure internet of things and related techniques

An integrated circuit chip and method for EEG monitoring. In one embodiment, the integrated circuit chip includes an Analog Front End cell in communication with an electrode and a Classification Processor wherein a signal received from the electrode is processed by the Classification Engine cell and designated as seizure or non-seizure. In another embodiment, the Analog Front End cell includes an amplifier cell in communication with an electrode; and an ASPU cell in communication with the amplifier cell. In yet another embodiment, the Classification Processor includes a DBE Channel Controller cell; a Feature Extraction Engine Processor cell, and a Classification Engine cell in communication with the Feature Extraction Engine Processor cells and the DBE Channel Controller cell.

Multi-channel scalable EEG acquisition system on a chip with integrated patient specific seizure classification and recording processor

A decoder comprises a feature extraction circuit for calculating one or more feature vectors; an acoustic model circuit coupled to receive one or more feature vectors from said feature extraction circuit and assign one or more likelihood values to the one or more feature vectors; a memory for storing states of transition of the decoder; and a search circuit for receiving an input from said acoustic model circuit corresponding to the one or more likelihood values based upon the one or more feature vectors, and for choosing states of transition from the memory based on the input from said acoustic model.

Systems and methods for providing secure communications using a protocol engine

Wireless resonant inductive power receivers for achieving detuning for a resonant wireless power transfer system including cooperative power sharing is described. Cooperative power sharing allows for detuning one or more wireless received coupled to a wireless charger to alter the power received at each wireless receiver.

Detuning for a resonant wireless power transfer system including cooperative power sharing

A method for assessing a three-dimensional (3D) surface area having one or more lesions is disclosed. The method includes steps of: capturing a two-dimensional (2D) color image and a depth image of the 3D surface area; enhancing contrast of the 2D color image; segmenting the one or more lesions of the 2D color image into one or more segmented lesions; and calculating 3D area of the one or more segmented lesions using information from 2D color image and the depth image.

Automated surface area assessment for dermatologic lesions

A method and apparatus for achieving detuning for a resonant wireless power transfer system including cryptography is described. Detuning for a resonant wireless power transfer system including cryptography allows for detuning a wireless receiver based upon authentication between the wireless receiver and a wireless charger.

Detuning for a resonant wireless power transfer system including cryptography

Efficient and reliable transmission of information from sparse sources over wireless channels in wireless signal networks (WSNs). WSN nodes employ an 'integrated signal representation-to-modulation' scheme to describe a sparse signal acquired from a sensor so as to ensure robustness against channel errors across a wide range of signal to noise (SNR) values in a rateless fashion. In one example, sparse signal samples are linearly transformed such that the total number of bits representing the sparse signal is reduced. The linearly-transformed signal samples are directly mapped to a modulation constellation to provide a succession of modulation symbols. A carrier wave is modulated in phase and/or frequency according to the succession of the modulation symbols to generate an encoded carrier wave representing the sparse analog signal. In one aspect, an order of the modulation constellation is based on the precision (e.g., number of bits) of each of the linearly-transformed signal samples.

Methods, apparatus and systems for transmission and reception of sparse signals in wireless sensor networks

Described is a receiver for improving end-to-end efficiency in a device-to-device wireless charging system using resonant energy transfer through an inductive link. The receiver includes an efficiency controller which dynamically tracks a maximum efficiency point and controls an impedance between an inductive coupling of the receiver and a receiver rectifier circuit such that an impedance seen by the inductive coupling is an impedance which maximizes (or nearly maximizes) efficiency of the inductively coupled wireless power transfer operation.

Efficiency maximization for device-to-device wireless charging

Wireless charging of portable electronic devices is carried out by detecting load variations caused by the device and dynamically compensating for these variations during charging to increase system efficiency and regulate delivered power. In some embodiments, load variations are tracked by comparing a feedback signal to a value range and determining whether the feedback value is higher than, lower than, or within the range of values. This information is then used to modify one or more parameters associated with a power amplifier in a transmitter device.

Method and apparatus for wirelessly charging portable electronic devices

In one aspect, the disclosure features systems for providing auditory signals to a subject. The systems include a sensor front-end circuit configured to be connected to an acoustic sensor and to convert analog signals received from the acoustic sensor to digital electric signals. The systems further include a sound processor circuit configured to be connected to the sensor front-end circuit and receive the electric signals provided by the sensor front end circuit. The sound processor includes multiple filters that spectrally decompose the received electrical signals into multiple spectral channels during operation of the system. The multiple spectral channels include at least a low frequency channel and a high frequency channel and the sound processor circuit is configured to operate the low frequency channel at a sample rate lower than a sample rate of the high frequency channel.

Low power cochlear implants

A time-interleaved (TI) analog-to-digital converter (ADC) architecture employs a low resolution coarse ADC channel that samples an input analog signal at a Nyquist rate and facilitates background calibration of timing-skew error without interrupting normal operation to sample/convert the input signal. The coarse ADC channel provides a timing reference for multiple higher resolution TI ADC channels that respectively sample the input signal at a lower sampling rate. The coarse ADC digital output is compared to respective TI ADC digital outputs to variably adjust in time corresponding sampling clocks of the TI ADC channels so as to substantially align them with the sampling clock of the coarse ADC channel, thus reducing timing-skew error. In one example, the coarse ADC output provides the most significant bits (MSBs) of the respective TI ADC digital outputs to further improve conversion speed and reduce power consumption in these channels.

Methods and apparatus for reducing timing-skew errors in time-interleaved analog-to-digital converters

Growing community of inventors

Belmont, MA, United States of America

Anantha P Chandrakasan