Lam Research Corporation

Novellus Systems Incorporated

Ananda K Banerji

Bart Jan Van Schravendijk

Bhadri N Varadarajan

George Andrew Antonelli

Adrien Lavoie

Shankar Swaminathan

Nagraj Shankar

Kevin M McLaughlin

Mandyam Sriram

Reza Arghavani

Samantha SiamHwa Tan

Seshasayee Varadarajan

Jun Qian

Akhil N Singhal

Vishwanathan Rangarajan

Casey Holder

Joseph Hung-chi Wei

Thomas W Mountsier

Jennifer O'Loughlin

Thorsten B Lill

Meihua Shen

Hui-Jung Wu

Mark Naoshi Kawaguchi

Gowri Kamarthy

John Hoang

Jialing Yang

Nathan Musselwhite

Jay E Uglow

Hao Chi

Gereng Gunawan

Jennifer O'Ioughlin

Aaron Lynn Routzahn

Nicholas Dominic Altieri

Methods for forming patterned multi-layer stacks including a metal-containing layer are provided herein. Methods involve using silicon-containing non-metal materials in a multi-layer stack including one sacrificial layer to be later removed and replaced with metal while maintaining etch contrast to pattern the multi-layer stack and selectively remove the sacrificial layer prior to depositing metal. Methods involve using silicon oxycarbide in lieu of silicon nitride, and a sacrificial non-metal material in lieu of a metal-containing layer, to fabricate the multi-layer stack, pattern the multi-layer stack, selectively remove the sacrificial non-metal material to leave spaces in the stack, and deposit metal-containing material into the spaces. Sacrificial non-metal materials include silicon nitride and doped polysilicon, such as boron-doped silicon.

Film stack simplification for high aspect ratio patterning and vertical scaling

Disclosed herein are methods of doping a fin-shaped channel region of a partially fabricated 3-D transistor on a semiconductor substrate. The methods may include forming a multi-layer dopant-containing film on the substrate, forming a capping film comprising a silicon carbide material, a silicon nitride material, a silicon carbonitride material, or a combination thereof, the capping film located such that the multi-layer dopant-containing film is located in between the substrate and the capping film, and driving dopant from the dopant-containing film into the fin-shaped channel region. Multiple dopant-containing layers of the film may be formed by an atomic layer deposition process which includes adsorbing a dopant-containing film precursor such that it forms an adsorption-limited layer on the substrate and reacting adsorbed dopant-containing film precursor. Also disclosed herein are multi-station substrate processing apparatuses for doping the fin-shaped channel regions of partially fabricated 3-D transistors.

Capped ALD films for doping fin-shaped channel regions of 3-D IC transistors

Methods and apparatuses suitable for encapsulation layers for memory devices at temperatures less than about 300&#xb0; C. are provided herein. Methods involve introducing a reactive species by pulsing plasma while exposing a substrate to deposition reactants, and post-treating deposited encapsulation films to densify and reduce hydrogen content. Post-treatment methods include periodic exposure to inert plasma without reactants and exposure to ultraviolet radiation at a substrate temperature less than about 300&#xb0; C.

Methods of encapsulation

Methods and apparatuses suitable for depositing low hydrogen content, hermetic, thin encapsulation layers at temperatures less than about 300&#xb0; C. are provided herein. Methods involve pulsing plasma while exposing a substrate to deposition reactants, and post-treating deposited encapsulation films to densify and reduce hydrogen content. Post-treatment methods include periodic exposure to inert plasma without reactants and exposure to ultraviolet radiation at a substrate temperature less than about 300&#xb0; C.

Disclosed herein are methods of doping a fin-shaped channel region of a partially fabricated 3-D transistor on a semiconductor substrate. The methods may include forming a multi-layer dopant-containing film on the substrate, forming a capping film comprising a silicon carbide material, a silicon carbonitride material, silicon oxycarbide material, silicon carbon-oxynitride, or a combination thereof, the capping film located such that the multi-layer dopant-containing film is located in between the substrate and the capping film, and driving dopant from the dopant-containing film into the fin-shaped channel region. Multiple dopant-containing layers of the film may be formed by an atomic layer deposition process which includes adsorbing a dopant-containing film precursor such that it forms an adsorption-limited layer on the substrate and reacting adsorbed dopant-containing film precursor. Also disclosed herein are multi-station substrate processing apparatuses for doping the fin-shaped channel regions of partially fabricated 3-D transistors.

Various embodiments herein relate to formation of contact etch stop layers in the context of forming gates and contacts. In certain embodiments, a novel process flow is used, which may involve the deposition and removal of a sacrificial pre-metal dielectric material before a particular contact etch stop layer is formed. An auxiliary contact etch stop layer may be used in addition to a primary etch stop layer that is deposited previously. In certain cases the contact etch stop layer is a metal-containing material such as a nitride or an oxide. The contact etch stop layer may be deposited through a cyclic vapor deposition in some embodiments. The process flows disclosed herein provide improved protection against over-etching gate stacks, thereby minimizing gate-to-contact leakage. Further, the disclosed process flows result in wider flexibility in terms of materials and deposition conditions used for forming various dielectric materials, thereby minimizing parasitic capacitance.

Sacrificial pre-metal dielectric for self-aligned contact scheme

Methods of depositing conformal aluminum nitride films on semiconductor substrates are provided. Disclosed methods involve (a) exposing a substrate to an aluminum-containing precursor, (b) purging the aluminum-containing precursor for a duration insufficient to remove substantially all of the aluminum-containing precursor in gas phase, (c) exposing the substrate to a nitrogen-containing precursor to form aluminum nitride, (d) purging the nitrogen-containing precursor, and (e) repeating (a) through (d). Increased growth rate and 100% step coverage and conformality are attained.

High growth rate process for conformal aluminum nitride

Hardmask films having high hardness and low stress are provided. In some embodiments a film has a stress of between about &#x2212;600 MPa and 600 MPa and hardness of at least about 12 GPa. In some embodiments, a hardmask film is prepared by depositing multiple sub-layers of doped or undoped silicon carbide using multiple densifying plasma post-treatments in a PECVD process chamber. In some embodiments, a hardmask film includes a high-hardness boron-containing film selected from the group consisting of SiBC, SiBN, SiBCN, BC, and BN. In some embodiments, a hardmask film includes a germanium-rich GeNmaterial comprising at least about 60 atomic % of germanium. These hardmasks can be used in a number of back-end and front-end processing schemes in integrated circuit fabrication.

Hardmask materials

Protective caps residing at an interface between metal lines and dielectric diffusion barrier (or etch stop) layers are used to improve electromigration performance of interconnects. Protective caps are formed by depositing a first layer of aluminum-containing material over an exposed copper line by treating an oxide-free copper surface with an organoaluminum compound in an absence of plasma at a substrate temperature of at least about 350&#xb0; C. The formed aluminum-containing layer is passivated either partially or completely in a chemical conversion which forms Al&#x2014;N, Al&#x2014;O or both Al&#x2014;O and Al&#x2014;N bonds in the layer. Passivation is performed in some embodiments by contacting the substrate having an exposed first layer with an oxygen-containing reactant and/or nitrogen-containing reactant in the absence of plasma. Protective caps can be formed on substrates comprising exposed ULK dielectric. The aluminum-containing layer residing on the dielectric portion will typically spontaneously form non-conductive layer comprising Al&#x2014;O bonds.

Interfacial layers for electromigration resistance improvement in damascene interconnects

Protective caps residing at an interface between metal lines and dielectric diffusion barrier (or etch stop) layers are used to improve electromigration performance of interconnects. Protective caps are formed by depositing a source layer of dopant-generating material (e.g., material generating B, Al, Ti, etc.) over an exposed copper line, converting the upper portion of the source layer to a passivated layer (e.g., nitride or oxide) while allowing an unmodified portion of a dopant-generating source layer to remain in contact with copper, and, subsequently, allowing the dopant from the unmodified portion of source layer to controllably diffuse into and/or react with copper, thereby forming a thin protective cap within copper line. The cap may contain a solid solution or an alloy of copper with the dopant.

Growing community of inventors

West Linn, OR, United States of America

Ananda K Banerji