Cirrus Logic Inc.

Anand Venkitachalam

Krishnan Subramoniam

John L Melanson

Dylan Alexander Hester

Rajendra Datar

Joe Welser

Ahsan Habib Chowdhury

Manoj Shridhar Soman

Jens Puchert

Brian K Straup

Brian Frank Bounds

A clock generator system and method for providing and operating a codes with a clock signal at a desired operational rate are disclosed. The clock generator system also has a phase-locked loop circuit. The clock generator system determines whether an available clock signal within a circuit environment of the codec has a desired clock rate. If the available clock signal has the desired clock rate, the clock generator system supplies and operates the codec with the available clock signal. If the available clock signal does not have the desired clock rate, the phase-locked loop circuit generates from the available clock signal a desired clock signal having the desired clock rate and supplies and operates the codec with the desired clock signal.

Method and system for providing a codec clock signal at a desired operational rate

A method of gamma correction includes selecting lower and upper reference curves corresponding to selected reference gamma values. A gamma correction curve is generated from a corresponding gamma correction value and cross-correlated with the upper and lower reference curves to generate a corresponding set of cross-correlation factors. The set of cross-correlation factors are stored and indexed to the corresponding gamma value. An input value is received for gamma correction with the corresponding gamma value. Data from the upper and lower reference curves indexed by the input value are then operated one with the cross-correlation factors to generate a gamma corrected output value.

Methods and circuits for implementing programmable gamma correction

A method of performing sample rate conversion in a data converter operating from an oversampling clock corresponding to a native sample rate and a native oversampling factor. A virtual sample rate and a virtual oversampling factor are selected proportional to the native sample rate and the native oversampling factor. A data stream having a data sample rate is sampled by the virtual oversampling factor. The data stream is also resampled with a resampling ratio approximating a ratio of the data sample rate to the virtual sample rate.

Sample rate converters using virtual sample rates and analog to digital and digital to analog converters using the same

An integrated analog to digital and sample rate converter includes sampling circuitry for receiving an analog signal and generating a single or multibit stream of digital signals at a first rate. A leaky integrator filter removes quantization noise from the stream of samples such that resampling can be carried out. Circuitry resamples the filtered stream of samples output from leaky integrator filter to generate an output stream of samples at a second rate.

Analog to digital converters with integral sample rate conversion and systems and methods using the same

A sample rate converter includes a filter for processing digital data in response to a clock controlled by a clock enable signal, the filter receiving the digital data at a first sampling rate and outputting digital data at a second sampling rate. Resampler circuitry generates first selected periods of the clock enable signal having a first duty cycle approximating a ratio between the first sampling rate and the second sampling rate. Selectively, selected periods of the clock enable signal are generated having a second duty cycle for minimizing an error accumulated over the first selected periods of the clock enable signal.

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Pune, India

Anand Venkitachalam