Apple Inc.

Anand Dalal

Joshua P De Cesare

Manu Gulati

Brijesh Tripathi

Erik P Machnicki

Shane J Keil

Gilbert H Herbeck

Jung Wook Cho

Timothy John Millet

Daniel Wilson

Josh P De Cesare

Lawrence G Bolton

Gregory Thomas Lydon

Jonathan Jay Andrews

Michael F Culbert

Mitchell David Adler

Haining Zhang

Wade Benson

Paul William Chinn

Roberto G Yepez

Ronnie G Misra

Anish C Trivedi

Alan M Dunn

In an embodiment, a system on a chip (SOC) includes a component that remains powered when the remainder of the SOC is powered off. The component may include a sensor capture unit to capture data from various device sensors, and may filter the captured sensor data. Responsive to the filtering, the component may wake up the remainder of the SOC to permit the processing. The component may store programmable configuration data, matching the state at the time the SOC was most recently powered down, for the other components of the SOC, in order to reprogram them after wakeup. In some embodiments, the component may be configured to wake up the memory controller within the SOC and the path to the memory controller, in order to write the data to memory. The remainder of the SOC may remain powered down.

System on a chip with always-on processor

In an embodiment, a system on a chip (SOC) includes a component that remains powered when a central processing unit (CPU) processor and a memory controller of the SOC are powered off. The component may include a sensor capture unit to capture audio samples from an audio detector circuit and write them to a memory of the component. A processor of the component may be configured to search the audio samples for a predetermined pattern during a time when the CPU processor and the memory controller are powered down. In some embodiments, based on the audio samples filling to a threshold level in the memory of the component and a lack of detection of the predetermined pattern, the component is configured to wake up the memory controller and a path to the memory controller in order to write the audio sample to a memory controlled by the memory controller.

System on a chip with always-on component with powered-down configurations to process audio samples

Techniques are disclosed relating to maintaining device security associated with reduced power modes. In some embodiments, a computing device receives a request to place the computing device in a reduced power mode in which a first memory of the computing device is powered off. Based on the request, the computing device offloads a memory page from the first memory to a second memory such that the offloading includes encrypting the memory page. Based on a request to resume from the reduced power mode, the computing device restores the memory page from the second memory to the first memory such that the restoring includes decrypting the encrypted memory page. After initiating the restoring, the computing device presents a user authentication prompt asking for a user credential.

Secure reduced power mode

System on a chip with fast wake from sleep

Methods and apparatus for managing connections between multiple internal integrated circuits (ICs) of, for example, a high-speed internal device interface. Improved schemes for coordination of connection and disconnection events, and/or suspension and resumption of operation for a High-Speed Inter-Chip&#x2122; (HSIC) interface are disclosed. In one exemplary embodiment, a 'device'-initiated and 'host'-initiated connect/disconnect procedure is disclosed, that provides improved timing, synchronization, and power consumption.

Methods and apparatus for reducing power consumption within embedded systems

System on a chip with always-on processor which reconfigures SOC and supports memory-only communication mode

Growing community of inventors

San Jose, CA, United States of America

Anand Dalal