Lam Research Corporation

Novellus Systems Incorporated

Anand Chandrashekar

Raashina Humayun

Michal Danek

Deqi Wang

Esther Jeng

Juwen Gao

Tsung-Han Yang

Gang Liu

Leonard Wai Fung Kho

Feng Chen

Rohit Khare

Krishna Birru

Bo Gong

Sean C Chang

Huatan Qiu

Curtis Warren Bailey

Geoffrey Hohn

Aaron R Fellis

Guangbi Yuan

Damodar Rajaram Shanbhag

Andrew H Breninger

Fengyuan Lai

Tony Kaushal

Chen-Hua Hsu

Jasmine Lin

William Schlosser

Thadeous Bamford

Michael Bowes

Samantha SiamHwa Tan

Kaihan Abidi Ashtiani

Keren Jacobs Kanarik

Wenbing Yang

Chiukin Steven Lai

Lana Hiului Chan

Michael J Wood

Liang Meng

Teh-Tien Su

Waikit Fung

Mirko Glass

Anil Mane

Lei Guo

Eric H Lenz

Sanjay Gopinath

Ronald Allan Powell

Atashi Basu

David M Fried

Joydeep Guha

Hua Xiang

Xing Zhang

Dongyao Li

Kapil Umesh Sawlani

Leonard Kho

Michael Danek

Madhu Santosh Kumar Mutyala

John W Griswold

Gishun Hsu

Provided herein are methods and apparatuses for controlling uniformity of processing at an edge region of a semiconductor wafer. In some embodiments, the methods include providing a backside inhibition gas as part of a deposition-inhibition-deposition (DID) sequence.

Backside reactive inhibition gas

Methods of mitigating line bending during feature fill include deposition of a nucleation layer having increased roughness. In some embodiments, the methods include depositing two or more metal nucleation layers.

Reducing line bending during metal fill process

Described herein are methods of filling features with tungsten, and related systems and apparatus, involving inhibition of tungsten nucleation. In some embodiments, the methods involve selective inhibition along a feature profile. Methods of selectively inhibiting tungsten nucleation can include exposing the feature to a direct or remote plasma. In certain embodiments, the substrate can be biased during selective inhibition. Process parameters including bias power, exposure time, plasma power, process pressure and plasma chemistry can be used to tune the inhibition profile. The methods described herein can be used to fill vertical features, such as in tungsten vias, and horizontal features, such as vertical NAND (VNAND) wordlines. The methods may be used for both conformal fill and bottom-up/inside-out fill. Examples of applications include logic and memory contact fill, DRAM buried wordline fill, vertically integrated memory gate/wordline fill, and 3-D integration using through-silicon vias.

Tungsten feature fill with nucleation inhibition

An exhaust system for a substrate processing system includes a radical generator configured to receive a gas mixture including halogen species and to generate halogen radicals, a first pump to pump exhaust gas from an exhaust outlet of a processing chamber, and a first valve configured to selectively fluidly connect an outlet of the radical generator to the first pump downstream from the outlet of the processing chamber.

Cleaning system for removing deposits from pump in an exhaust of a substrate processing system

Described herein are methods of filling features with tungsten, and related systems and apparatus, involving inhibition of tungsten nucleation. In some embodiments, the methods involve selective inhibition along a feature profile. Methods of selectively inhibiting tungsten nucleation can include exposing the feature to ammonia vapor in a non-plasma process. Process parameters including exposure time, substrate temperature, and chamber pressure can be used to tune the inhibition profile. Also provided are methods of filling multiple adjacent lines with reduced or no line bending. The methods involve selectively inhibiting the tungsten nucleation to reduce sidewall growth during feature fill.

Methods for selective inhibition control in semiconductor manufacturing are provided. An example method includes providing a substrate including a feature having one or more feature openings and a feature interior. A nucleation layer is formed on a surface of the feature interior. Based on a differential inhibition profile, a nonconformal bulk layer is selectively formed on a surface of the nucleation layer to leave a region of the nucleation layer covered, and a region of the nucleation layer uncovered by the nonconformal bulk layer. An inhibition layer is selectively formed on the covered and uncovered regions of the nucleation layer. Tungsten is deposited in the feature in accordance with the differential inhibition profile.

Tungsten feature fill with inhibition control

Forming a protective coating ex situ in an atomic layer deposition process to coat one or more chamber components subsequently installed in a reaction chamber provides a number of benefits over more conventional coating methods such as in situ deposition of an undercoat. In certain cases the protective coating may have a particular composition such as aluminum oxide, aluminum fluoride, aluminum nitride, yttrium oxide, and/or yttrium fluoride. The protective coating may help reduce contamination on wafers processed using the coated chamber component. Further, the protective coating may act to stabilize the processing conditions within the reaction chamber, thereby achieving very stable/uniform processing results over the course of processing many batches of wafers, and minimizing radical loss. Also described are a number of techniques that may be used to restore the protective coating after the coated chamber component is used to process semiconductor wafers.

Ex situ coating of chamber components for semiconductor processing

Methods of mitigating line bending during feature fill include deposition of an amorphous layer and/or an inhibition treatment during fill.

Methods of depositing a tungsten nucleation layers that achieve very good step coverage are provided. The methods involve a sequence of alternating pulses of a tungsten-containing precursor and a boron-containing reducing agent, while co-flowing hydrogen (H2) with the boron-containing reducing agent. The H2 flow is stopped prior to the tungsten-containing precursor flow. By co-flowing H2 with the boron-containing reducing agent but not with the tungsten-containing precursor flow, a parasitic CVD component is reduced, resulting in a more self-limiting process. This in turn improves step coverage and conformality of the nucleation layer. Related apparatuses are also provided.

High step coverage tungsten deposition

Provided herein are methods of depositing low stress and void free metal films in deep features and related apparatus. Embodiments of the methods include treating the sidewalls of the holes to inhibit metal deposition while leaving the feature bottom untreated. In subsequent deposition operations, metal precursor molecules diffuse to the feature bottom for deposition. The process is repeated with subsequent inhibition operations treating the remaining exposed sidewalls. By repeating inhibition and deposition operations, high quality void free fill can be achieved. This allows high temperature, low stress deposition to be performed.

Void free low stress fill

Described herein are methods of filling features with tungsten, and related systems and apparatus, involving inhibition of tungsten nucleation. In some embodiments, the methods involve selective inhibition along a feature profile. Methods of selectively inhibiting tungsten nucleation can include exposing the feature to a direct or remote plasma. Pre-inhibition and post-inhibition treatments are used to modulate the inhibition effect, facilitating feature fill using inhibition across a wide process window. The methods described herein can be used to fill vertical features, such as in tungsten vias, and horizontal features, such as vertical NAND (VNAND) wordlines. The methods may be used for both conformal fill and bottom-up/inside-out fill. Examples of applications include logic and memory contact fill, DRAM buried wordline fill, vertically integrated memory gate and wordline fill, and 3-D integration using through-silicon vias.

Feature fill with nucleation inhibition

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Fremont, CA, United States of America

Anand Chandrashekar