Silicon Works Co., Ltd.

An Young Kim

Joon Ho Na

Dae Seong Kim

Dae Keun Han

Soo Woo Kim

Yong Icc Jung

Sang Woo Kim

Myung Yu Kim

Ji Hun Kim

Yun Tack Han

Yong Jung Kwon

Hyun Ho Cho

Hun Yong Lim

Jung Hwan Choi

Hae Won Lee

Pyung Sik Ma

Joung Cheul Choi

Yeong Joon Son

Jung Il Seo

Hyun Min Song

Yong Bok Kim

Young Keun Ko

Kyung Chun Kim

Sung Wan Jung

Jeong Cheul Choi

A display driving circuit is configured to select one of application of a pair of pixel driving signals to a pair of output terminals and charge sharing between the pair of output terminals by using charges discharged from a display panel.

Display driving circuit and display device

The present invention discloses an input buffer circuit capable of recognizing and driving a low-voltage signal, output from a low-voltage environment, in a high-voltage environment and a gate driver IC including the input buffer circuit. The input buffer circuit is configured to include two or more multi-stage inverters and to recognize and output a gate signal having a different voltage domain from an operating voltage. Accordingly, a signal interface environment between chips operating in different voltage domains can be provided.

Input buffer circuit and gate driver IC including the same

The present invention relates to an output voltage stabilization circuit. Specifically, the present invention relates to an output voltage stabilization circuit of a display device driving circuit, which generates a reference current dependent on a high source voltage using a current source independent of a magnitude of the high source voltage, generates a reference current dependent on a low source voltage using a current source independent of a magnitude of the low source voltage, and then generates a control signal by comparing the magnitudes to each other, whereby the output voltage stabilization circuit may stabilize an output voltage regardless of an order in which the low source voltage and the high source voltage are turned off in a circuit using both the low source voltage and the high source voltage.

Output voltage stabilization circuit of display device driving circuit

Provided is a driver IC chip of a liquid crystal display (LCD). The driver IC chip has a layout of power pads, which may uniformly apply an adhesive force on the entire adhesion surface of the driver IC chip, when the driver IC chip is mounted on a display panel according to a chip-on-glass (COG) technique.

Driver IC chip and pad layout method thereof

A liquid crystal display driving circuit and method. A data register block of a controller applies in advance a polarity control signal to data before the data are stored in latches of a data driver, exchanges the data, and then stores the exchanged data in the latches. Thereby, it is possible to provide multiplexers, which are otherwise required for respective channels, to one controller and to decrease the size of a chip.

Circuit for driving LCD device and driving method thereof

Provided is a technology for preventing noisy data from being displayed before valid data is inputted when power is turned on in a liquid crystal display. A source driver circuit for a liquid crystal display includes: a power supply voltage input unit configured to divide a first power supply voltage and a second power supply voltage, such that a middle level of the second power supply voltage is lower than a level of the first power supply voltage; a power supply voltage comparison unit configured to compare division voltages inputted from the power supply voltage input unit, and output an output voltage of a high level in a time period in which the middle level of the second power supply voltage is higher than the level of the first power supply voltage; a Schmitt trigger configured to output the output voltage of the power supply voltage comparison unit as a reset signal while preventing a sensitive response to external environment; and a specific voltage supply unit configured to output a voltage of a specific level in a time period between the input of the reset signal from the Schmitt trigger and the input of a first gate start pulse.

Source driver circuit of liquid crystal display device

The present invention relates to a display driving circuit and a display driving system, and more particularly, to a display driving circuit having a half-VDD power supply circuit built therein and a display driving system including the same, in which the display driving circuit is further provided with a half voltage VDD terminal in addition to the highest voltage VDD terminal and the lowest voltage VSS terminal, and the half voltage, which is between the highest voltage and the lowest voltage, is generated and supplied by the half voltage power supply from the inside of the display driving circuit, rather than being supplied from an external power supply.

Display driving circuit having half VDD power supply circuit built therein and display driving system including the same

Provided is a COG panel system capable of minimizing a block dim effect by considering a relationship among a plurality of chips. The COG panel system includes: an FPC which supplies at least two power supply voltages having a constant voltage level; a plurality of SDIs which are commonly supplied with a bypass power supply voltage from the FPC and generate respective parts of a plurality of consecutive LCD driving signals required for an arbitrary one line of an LCD; and at least one block dim correction resistance.

COG panel system arrangement

A pad layout structure of a driver IC chip to be mounted to a liquid crystal display panel. The pad layout structure includes power pad sections placed at respective four corners of the driver IC chip and each having a first power pad for supplying first power to the driver IC chip, a second power pad for supplying second power to the driver IC chip, a third power pad for supplying third power to the driver IC chip and a fourth power pad for supplying fourth power to the driver IC chip.

Pad layout structure of a driver IC chip

A gamma voltage generator includes an RGB common gamma voltage generation section configured to generate RGB common gamma voltages using corresponding gamma reference voltages among a plurality of gamma reference voltages; and at least two of an RG gamma voltage generation section configured to generate RG gamma voltages using corresponding gamma reference voltages among the plurality of gamma reference voltages, an R gamma voltage generation section configured to generate R gamma voltages using corresponding gamma reference voltages among the plurality of gamma reference voltages, a G gamma voltage generation section configured to generate G gamma voltages using corresponding gamma reference voltages among the plurality of gamma reference voltages, and a B gamma voltage generation section configured to generate B gamma voltages using corresponding gamma reference voltages among the plurality of gamma reference voltages.

Growing community of inventors

Daejeon-si, South Korea

An Young Kim