Intel Corporation

Amruthavalli Palla Alur

Islam A Salama

Yonggang Li

Charan K Gurumurthy

Xiwang Qi

Devarajan Balaraman

Kristof Darmawikarta

Omar James Bchir

Dilan Seneviratne

Yikang Deng

Houssam Jomaa

Wei-Lun Kane Jen

Amanda E Schuckman

Siddharth K Alur

Haifa Hariri

Sri Chaitra Chavali

Embodiments include semiconductor packages. A semiconductor package includes a first patch and a second patch on an interposer. The semiconductor package also includes a first substrate in the first patch, and a second substrate in the second patch. The semiconductor package further includes an encapsulation layer over and around the first and second patches, a plurality of build-up layers on the first patch, the second patch, and the encapsulation layer, and a plurality of dies and a bridge on the build-up layers. The bridge may be communicatively coupled with the first substrate of the first patch and the second substrate of the second patch. The bridge may be an embedded multi-die interconnect bridge (EMIB). The first and second substrates may be EMIBs and/or high-density packaging (HDP) substrates. The bridge may be positioned between two dies, and over an edge of the first patch and an edge of the second patch.

Substrate patch reconstitution options

Various embodiments of the disclosure are directed to a semiconductor package and a method for fabrication of the semiconductor package. Further, disclosed herein are systems and methods that are directed to using a photoimagable dielectric (PID) layer with substantially similar mechanical properties as that of a mold material. The disclosure can be used, for example, in the context of bumpless laserless embedded substrate structures (BLESS) technology for wafer/panel level redistribution layer (RDL) and/or fan-out packaging applications. The disclosed embodiments may reduce the need for multiple dry resist film (DFR) lamination steps during various processing steps for semiconductor packaging and can also facilitate multiple layer counts due to the availability of thin PID materials.

Systems and methods for semiconductor packages using photoimageable layers

A semiconductor package comprises a semiconductor substrate that may comprise a core. The core may comprise one or more materials selected from a group comprising ceramics and glass dielectrics. The package further comprises a set of one or more inner conductive elements that is provided on the core, a set of one or more outer conductive elements that is provided on an outer side of the substrate, and a semiconductor die to couple to the substrate via one or more of the outer conductive elements. Example materials for the core may comprise one or more from alumina, zirconia, carbides, nitrides, fused silica, quartz, sapphire, and Pyrex. A laser may be used to drill one or more plated through holes to couple an inner conductive element to an outer conductive element. A dielectric layer may be formed in the substrate to insulate an outer conductive element from the core or an inner conductive element.

Method and core materials for semiconductor packaging

In one embodiment, a substrate includes a core material formed from a filler including aluminum trihydrate and a secondary filler material. The secondary filler material has a secondary decomposition reaction that occurs at a temperature higher than a reflow temperature reached during processing of the substrate, or the secondary filler traps water released at reflow temperature by aluminum trihydrate. Other embodiments are described and claimed.

Heat resistant halogen free substrate core material

A method of manufacturing a substrate for a microelectronic device comprises providing a dielectric material () as a build-up layer of the substrate, applying a primer () to a surface () of the dielectric material, and forming an electrically conductive layer () over the primer. In another embodiment, the method comprises providing the dielectric material, forming the feature extending into the dielectric material, forming the electrically conductive layer over the dielectric material, applying the primer to a surface of the electrically conductive layer and attaching a dielectric layer () to the primer.

Method of manufacturing a substrate for a microelectronic device, and substrate formed thereby

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Chandler, AZ, United States of America

Amruthavalli Palla Alur