Aptix Corporation

Actel Corporation, Inc.

Other

Amr M Mohsen

Esmat Z Hamdy

John L McCullum

Abbas A El Gamal

Khaled A El-Ayat

John L McCollum

Steve S Chiang

Ralph G Whitten

Shih-Ou Chen

Robert Osann, Jr

Ta-Pen Guo

Alan Elbert Comer

Khaled A El Ayat

Khaled A El-Avat

Abbas Elgamal

Abbas E Gamal

George A Shaw, Jr

An interconnect structure is centered around a substrate having opposite first and second surfaces. Component contacts allocated to cells in the substrate, are provided over both substrate surfaces. Conductive leads extend over each surface in two different directions. The conductive leads are selectively connected to the component contacts. The interconnect structure includes a capability for programmability electrically connecting, or disconnecting, the conductive leads in a desired manner.

Double-sided programmable interconnect structure

A user-programmable interconnect architecture, which may be used for logic arrays for digital and analog system design, is disclosed. In one embodiment, a plurality of logic cells or modules in a matrix are connected by vertical and horizontal wiring channels. The wiring channels may in turn be programmed by the user to interconnect the various logic cells to implement the required logic function. The wiring channels comprise wiring segments connected by normally open programmable. Elements situated at the intersection of any two segments to be connected.

Programmable interconnect architecture

An interconnect structure is centered around a substrate having multiple component contacts for receiving electronic components. Multiple conductive traces are provided over the substrate or in multiple layers of the substrate. Each conductive trace is connected to one of the component contacts. A programmable IC having a group of separate conductive leads is connected to the substrate. Two or more of the conductive leads are connected to corresponding ones of the conductive traces. The IC has programmable elements, such as electrically programmable elements, for selectively connecting the conductive leads, thereby enabling selected conductive traces to be interconnected so as to achieve a desired electrical function from the electronic components connected to the substrate. A test chip, an interconnect structure that contains the test chip, and a related test method are also provided.

Interconnect substrate with circuits for field-programmability and

A field programmable printed circuit board is provided which includes a multiplicity of component contacts for making electrical contact to the leads of electronic components to be mounted on the printed circuit board, a corresponding multiplicity of interconnect contacts for receipt of the leads on the package or packages of a programmable integrated circuit-or circuits for interconnecting as desired the electronic components, and one or more layers of conductive traces formed on the printed circuit board, each conductive trace uniquely connecting electrically one component contact to one interconnect contact.

Field programmable printed circuit board

An interconnect structure is centered around a substrate having multiple component contacts for receiving electronic components. Multiple conductive traces are provided on the substrate. Each conductive trace is electrically connected to one of the component contacts. A programmable IC having a group of separate conductive leads is connected to the substrate. Two or more of the conductive leads are connected to corresponding conductive traces on the substrate. The IC has programmable elements for selectively connecting the conductive leads, thereby enabling a user to interconnect selected conductive traces on the substrate to achieve a desired electrical function from the electronic components connected to the substrate. The interconnect structure also contains circuitry for transmitting control signals to the programmable IC to control its configuration so as to control the interconnection of the conductive traces.

Interconnect structure with programmable IC for interconnecting

The invention uses a programmable interconnect substrate having a plurality of conductive and interconnectable vias located on one or both surfaces thereof. A customized pattern of bonding pads is then formed over the one or both surfaces of the substrate which correspond to the terminal footprints of specific surface mounted packages intended to be mounted on the substrate. A generalized pattern of bonding pads may also be formed on the surfaces of the substrate for electrically connecting terminals of bare dice thereto by means of thin wire. All bonding pads are electrically connected to one or more vias by direct electrical contact or by a conductive trace extending from the bonding pad to a nearby via.

Field programmable circuit module

A structure for interconnecting electronic components contains a group of first programmable integrated circuits (331-1-331-3 and 331-5-331-7), at least one second programmable integrated circuit (331-4) and at least one substrate (300), typically a printed circuit board. The first programmable integrated circuits are connected through conductive traces to component contacts formed on the substrate(s) for receiving the electronic components. The first programmable integrated circuits are also connected through bus lines (333-1-333-3 and 333-5-333-7) to the second programmable integrated circuit(s). The electronic components are thereby interconnected through the combination of the first and second programmable integrated circuits.

Structure having different levels of programmable integrated circuits

An interconnect structure contains an interconnect substrate, multiple component contacts formed on the interconnect substrate for receipt of electronic components, and multiple conductive traces formed on the interconnect substrate. Each conductive trace is electrically connected to one of the component contacts. An IC having a group of parallel of conductive leads is mounted on the substrate. At least one of the conductive leads is divided into two or more segments. One or more of the conductive leads or segments are connected to corresponding conductive traces on the interconnect substrate. In one embodiment, the IC is a programmable chip having programmable elements for selectively connecting the conductive leads or segments, thereby enabling a user to interconnect selected conductive traces on the interconnect substrate to achieve a desired electrical function from the electronic components connected to the substrate. In another embodiment, the IC contains active devices for testing the IC's conductive leads, the conductive traces on the substrate, and/or the electronic components mounted on the component contacts.

User-configurable logic circuits comprising antifuses and

A user-programmable interconnect device includes a first lower electrode comprising a conductive material. A layer of dielectric material is disposed over the top surface of the lower conductor. An antifuse material, such as one or more layers of a dielectric material, amorphous silicon, or combinations of such materials, is located in an aperture in the dielectric material where the interconnect element of the present invention is to be formed. A second, upper electrode of conductive material is formed over the top of the antifuse material. A portion of the upper electrode located immediately above the antifuse material is fabricated as a fuse material. A passivation layer covers the second electrode and may have an aperture located therein at a location immediately above the antifuse and fuse material. Electrical connections to circuitry incorporating the interconnect element of the present invention are made to the lower and upper electrodes.

Electrically programmable interconnect element for integrated circuits

A high I/O count integrated circuit is disposed on a semiconductor chip having opposing faces and comprises a plurality of functional circuit modules, each having inputs and at least one output having a first drive capability. A plurality of a first type of I/O nodes, each comprising a first conductive structure is disposed in a first I/O node array on the surface of a first one of the semiconductor chip faces. A plurality of a second type of I/O nodes, each comprising a first conductive structure is disposed on the first semiconductor chip face. An interconnect architecture comprising a plurality of conductors is superimposed on the functional circuit modules, the interconnect architecture comprises a plurality of interconnect conductors. Selected ones of the interconnect conductors are connectable to the inputs and at least one output of selected ones of the functional circuit modules by electrically programmable user-programmable interconnect elements. Selected ones of the interconnect conductors are connectable to other selected ones of the interconnect conductors by user-programmable interconnect elements. Selected ones of the interconnect conductors are connectable to the first I/O nodes by electrically programmable user-programmable interconnect elements. Selected ones of the interconnect conductors are connectable to the second I/O nodes by electrically programmable user-programmable interconnect elements.

Multichip module integrated circuit device having maximum input/output

Electrically-programmable low-impedance antifuses are disclosed having capacitor-like structure with very low leakage before programming and a low resistance after programming. The antifuses of the present invention include a first conductive electrode which may be formed as a diffusion region in a semiconductor substrate or may be formed from a semiconductor material, such as polysilicon, located above and insulated from the substrate. A dielectric layer is disposed over the first electrode. A second electrode is formed over the dielectric layer from a semiconductor material such as polysilicon, or metal having a barrier metal underneath. At least one of the two electrodes of each antifuse is highly-doped or implanted with arsenic such that high concentrations of arsenic exist at the interface between the electrode and the dielectric layer.

Electrically-programmable low-impedance anti-fuse element

A universal interconnect matrix area array or crosspoint switch is comprised of a first set of conductive leads formed in a first direction, a second set of conductive leads formed in a second direction, the second direction being not parallel to the first direction, and structure for electrically interconnecting selected ones of the conductive leads in the first set of conductive leads to one or more of the conductive leads in the second set of conductive leads. Input/output pads are arranged in an area matrix and connected to selected ones of the first set of conductive leads and the second set of conductive leads. Selected ones of the conductive leads are segmented thereby to allow any input/output pad to be connected to one or more of the other input/output pads without removing from use any input/output pads not intended to be so connected. At least one of the input/output pads is internal to the input/output pads along the periphery of the area matrix.

Universal interconnect matrix array

A field programmable printed circuit board is provided which includes a multiplicity of component contacts for making electrical contact to the leads of electronic components to be mounted on the printed circuit board, a corresponding multiplicity of interconnect contacts for receipt of the leads on the package or packages of a programmable integrated circuit or circuits for interconnecting as desired the electronic components, and one or more layers of conductive traces formed on the printed circuit board, each conductive trace uniquely connecting electrically one component contact to one interconnect contact.

Growing community of inventors

Saratoga, CA, United States of America

Amr M Mohsen