Linear Technology Corporation

Amitkumar Pravin Patel

Robert C Dobkin

Carl T Nelson

Anthony K Bonte

A driver circuit for a PNP power transistor in an LDO regulator uses a Class AB (push-pull) buffer to supply the necessary base current to an NPN driver transistor, where the NPN driver transistor has its collector connected to the base of the PNP power transistor. A front end circuit of the driver, coupled to drive the Class AB buffer, uses a current diverting transistor, where a first portion of the current is used to control the pull-up transistor in the Class AB buffer, and the remainder of the current is used to control the pull-down transistor in the Class AB buffer, so the driver is very efficient. The portion of the driver circuit between the input of the driver circuit and the base of the NPN driver transistor is an inverting circuit. The driver can properly operate with an input voltage within two diode drops of ground.

Class AB inverting driver for PNP bipolar transistor LDO regulator

In an LDO regulator, two feedback loops are created. The first feedback loop includes a high power PNP bipolar power transistor connected in series between the input voltage Vin terminal and the output voltage Vout terminal. The first feedback loop includes a first error amplifier that controls a drive transistor to drive the base of the power transistor such that Vout matches a set voltage Vset. This first feedback loop circuitry uses an operating voltage (the upper rail voltage) that is regulated by a second feedback loop and is approximately 300 mV greater than Vout. As a result, the control circuitry will be powered by a low ripple supply to improve output PSRR. Further, the power transistor is connected such that any noise in the input voltage is a common mode voltage across the base-emitter of the transistor.

LDO regulator powered by its regulated output voltage for high PSRR

In one embodiment, a regulator circuit for generating a regulated output voltage Vout has an error amplifier using a pair of bipolar transistors at its front end. The error amplifier compares the regulated output voltage to a reference voltage Vref. A precision current source draws a first current through a user-selected set resistance to generate the desired Vref. The regulator circuit controls a power stage to cause Vout to be equal to Vref. The base current into one of the bipolar transistors normally distorts the current through the set resistance. A base current compensation circuit is coupled to the current source to adjust the first current by a value equal to the base current to offset the base current. Therefore, Vref is not affected by the base current. The error amplifier may be in a linear regulator or a switching regulator. The compensation circuit may be used in other applications.

Voltage generator with current source compensated for an error current operable over a wide voltage range

A linear regulator integrated circuit may be formed having four external terminals including a voltage input (Vin) terminal, a voltage output (Vout) terminal, a Set terminal, and an operational amplifier (op amp) power terminal. A user connects an external resistor to the Set terminal for creating a reference voltage. An op amp controls a pass (or series transistor) to cause an output voltage at the Vout terminal to equal the reference voltage. The op amp has a first power supply terminal internally coupled to the Vin terminal and a second power supply terminal coupled to the op amp power terminal. The op amp power terminal allows a user to externally couple the op amp second power supply terminal to either the Vout pin (for high voltage applications), system ground (for medium voltage applications), or another voltage (to provide additional headroom in very low voltage applications).

Linear regulator IC with versatile ground pin

A linear regulator contains an additional AC-coupled feedback loop between the output of the error amplifier and the base of the pass transistor that increases the frequency of the pole at the output of the error amplifier at light load currents to at least partially offset the decreased frequency of the output pole at the lighter load currents. Thus, a desired phase margin is preserved. The AC-coupled feedback loop includes a bipolar feedback transistor connected in parallel with the pass transistor. A resistor is connected to the emitter of the feedback transistor to reduce the relative gain of the feedback transistor above light load currents. A feedback capacitor Cfb is connected between the collector of the feedback transistor and the output of the error amplifier. The negative AC feedback increases the pole frequency at the output of the error amplifier and the base of the pass transistor.

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Milpitas, CA, United States of America

Amitkumar Pravin Patel