Marvellworld Trade Ltd.

Marvell Asia Pte., Ltd.

Amit Shmilovich

Eitan Joshua

Erez Amit

Shaul Chapman

Moshe Raz

Wilson Parkhurst Snyder, Ii

Sujat Jamil

Noam Mizrahi

Frank O'Bleness

Nir Ofir

Husam Khshaiboun

A device, such as a system on a chip (SoC), includes a plurality of processor cores, a broadcaster module, a plurality of decoder units, and an aggregator module. The broadcaster module broadcasts a debug request from a debugger device to one or more of the plurality of processor cores via a bus, the debug request including an address specifying a logical identifier associated with a target processor core of the plurality of processor cores. The decoder units, associated with the processor cores, forward the debug request to a debug module of the respective processor core in response to detecting a match. If no match is detected, the decoder units forward the debug request to a subsequent processor core via the bus. The aggregator module forward a response message to the debugger device, the response message originating from the target processor core.

Processor core debugging with processor virtualization

In various embodiments, the present disclosure provides a system comprising a first plurality of processing cores, ones of the first plurality of processing cores coupled to a respective core interface module among a first plurality of core interface modules, the first plurality of core interface modules configured to be coupled to form in a first ring network of processing cores; a second plurality of processing cores, ones of the second plurality of processing cores coupled to a respective core interface module among a second plurality of core interface modules, the second plurality of core interface modules configured to be coupled to form a second ring network of processing cores; a first global interface module to form an interface between the first ring network and a third ring network; and a second global interface module to form an interface between the second ring network and the third ring network.

Interconnected ring network in a multi-processor system

Growing community of inventors

Kiryat Ata, Israel

Amit Shmilovich