Tower Semiconductor Ltd.

Microsoft International Holdings B.v.

Nanolab, Inc.

Amit Shacham

David Cohen

Shay Kaplan

Ephie Koltin

Dalia Oud

Margalit Ilovich Ayelet

A photosurface for receiving and registering light from a scene, the photosurface comprising: a first semiconductor region in which electron-hole pairs are generated responsive to light incident on the photosurface; a single, first conductive region substantially overlaying all of the first semiconductor region; at least one second semiconductor region surrounded by the first semiconductor region; a different second conductive region for each second semiconductor region that surrounds the second semiconductor region and is electrically isolated from the first conductive region; wherein when the second conductive region is electrified positive with respect to the first conductive region, electrons generated by light incident on the first semiconductor region are collected in the second semiconductor region.

CMOS photogate 3D camera system having improved charge sensing cell and pixel geometry

A device for moving a fluid in a fluidics system. The device may include one or more controllably openable closed chambers. The pressure within the closed chamber(s) is lower than the ambient pressure outside the fluidics system or lower than the pressure within another channel of the fluidic system. The closed chamber(s) is configured for being controllably opened. The chamber (or chambers) is configured such that when a chamber is opened the chamber is in fluidic communication with a flow channel included within the fluidics system. The fluid may be moved into the flow channel or may be moved within the flow channel. The fluid may be a liquid, a gas, a mixture of gases or an aerosol. The fluidics system may include a controller for controlling the opening of a selected chamber or chambers.

Apparatus, and method for propelling fluids

A method for stitching a plurality of mask regions including the steps of (1) defining cut regions on the mask regions, wherein the cut regions adjoin the edges of the mask regions to be stitched, (2) implementing a first set of design rules in the cut regions, and (3) implementing a second set of design rules outside of the cut regions. The mask regions can be formed on a single reticle or on a plurality of separate reticles. In one embodiment, the first set of design rules specifies that trace patterns in the cut regions have widths greater than trace patterns outside of the cut regions. In another embodiment, the first set of design rules specifies that trace patterns in the cut regions have a minimum spacing greater than trace patterns outside of the cut regions. In yet another embodiment, the first set of design rules specifies that trace patterns can be formed entirely within the cut regions. The stitching method can also include the steps of (1) defining a cut line on a wafer, (2) aligning first and second mask regions with the cut line such that transparent regions of the first and second mask regions have a controlled amount of overlap with respect to the cut line, and (3) selecting the controlled amount of overlap such that a pattern formed by the first and second mask regions has a uniform width adjacent to the cut line.

Stitching design rules for forming interconnect layers

A method of fitting a reticle pattern on a reticle, wherein the reticle pattern has dimensions that exceed the dimension of the reticle. The method includes the step of logically dividing the reticle pattern into a first window and a second window, wherein the first window and the second window overlap in a shared window region. The first and second windows are selected such that these separate windows are capable of being laid out within the dimensions of the reticle. The first window of the reticle pattern is converted from a first format, such as GDS or CIF, to a second format, such as MEBES, thereby creating a converted first window. The second window of the reticle pattern is also converted from the first format to the second format, thereby creating a converted second window. In one embodiment, resizing is performed during this conversion process. The resizing is restricted to one axis in the shared window region, thereby preventing alignment problems in a subsequent stitching process. The converted first and second windows are laid out on the reticle, such that these windows are separated from each other on the reticle. The first and second converted windows are then stitched together at the shared window region using a photolithographic stitching process, thereby forming the reticle pattern on a wafer.

Growing community of inventors

Haifa, Israel

Amit Shacham