Cadence Design Systems, Inc.

Amit Metodi

Marat Teplitsky

Yael Kinderman

Rodion Vladimirovich Melnikov

Matan Vax

Raz Azaria

Samer Raed Alqassis

Aspects of the present disclosure address systems and methods for functional coverage in integrated circuit (IC) designs utilizing arbitrary expression to define irrelevant domains in coverage item definitions. A coverage item definition is determined to include an arbitrary expression that defines an irrelevant domain for a coverage item in a functional coverage analysis of an IC design. Based on determining if the item definition comprises the arbitrary expression, a verification the arbitrary expression satisfies one or more analyzability conditions is performed. Based on verifying the arbitrary expression satisfies the one or more analyzability conditions, the irrelevant domain for the coverage item is calculated based on the arbitrary expression. An enhanced functional coverage model that excludes the irrelevant domain for the coverage item is generated and used to perform the functional coverage analysis on the IC design.

Coverage model enhancement to support logic and arithmetic expressions

Method and system for automatically generating executable system-level tests. The method includes obtaining a system design including interrelation between components of the system design, actions the components are operable to perform, and constraints relating to the performance of the actions; receiving at least an initial action input to be tested; automatically generating a complete test scenario including: solving a logic layer CSP, including automatically scheduling actions and data paths of the test scenario, and assigning values to logic attributes of the actions and data, satisfying constraints relating to the logic layer, and solving a data layer CSP, satisfying constraints relating to data attributes taking into account the constraints relating to the logic layer; and generating the executable system-level test by assembling the initial action and the set of scheduled actions and data paths and the data attributes.

Method and system for automatically generating executable system-level tests

A method, system and computer readable medium for coverage driven generation of stimuli for DUT verification. The method may include receiving, via an input device, a generation model and a coverage model from a user. The method may also include using a processor, identifying a coverage item in the coverage model and finding a corresponding element in the generation model corresponding to the coverage item. The method may further include using a processor translating a coverage requirement associated with the coverage item into a distribution directive; and using a processor, solving the generation model with the distribution directive on the corresponding element, to obtain a set of stimuli.

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Ashkelon, Israel

Amit Metodi