Micron Technology Incorporated

Western Digital Technologies, Inc.

Cadence Design Systems, Inc.

Amit Bhardwaj

Robert Alan Reid

Narayanan Vinay Krishnan

Vinay Sandeep

Sanandan Sharma

Robert Pierce

Prashanth Reddy Enukonda

A method includes issuing a program command to a logic unit (LUN) of a memory device, writing a plurality of commands to a transfer queue within the memory device, detecting a program failure for the LUN of the memory device, and maintaining a number of the plurality of commands in the transfer queue.

Memory sub-system transfer queue retention

A codeword decoder interoperates with a neural network to provide the neural network with an uncorrectable erroneous codeword and to classify the uncorrectable erroneous codeword into a correctable erroneous codeword. The codeword decoder and neural network may be utilized in the error correction unit for a memory array.

Extending the error correction capability of a device using a neural network

An invention is provided for wear leveling in a non-volatile memory system utilizing relative wear counters to indicate relative levels of wear for each memory block in a non-volatile memory system. Whenever a memory block is erased, the associated relative wear counter is incremented. Then, when any relative wear counter reaches a predetermined limit, the value of the lowest relative wear counter is subtracted from each relative wear counter. Thus, each relative wear counter indicates a relative wear level of the associated memory block relative to other memory blocks. In this manner, the relative wear levels are maintained while reducing the amount of memory needed to for each relative wear counter.

System and method for wear leveling utilizing a relative wear counter

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Bengaluru, India

Amit Bhardwaj