Magnacom Ltd.

Avago Technologies General IP (Singapore) Pte. Ltd.

Avago Technologies International Sales Pte. Limited

Amir Dov Eliaz

Ilan Reuven

Daniel Stopler

Gal Pitarasho

Roy Oren

Rethnakaran Pulikkoonattu

Amos Intrater

Shlomy Chaikin

Vinko Erceg

Rohit Gaikwad

Colin Fraser

Peyush Agarwal

Dengwei Fu

Shimon Benjo

Rana A Abdelaal

Nir Stahl Diskin

Sandeep Shenoy

Hyoung Keun Ryu

A transmit power optimization and rate-control system includes a transmitter circuit having one or more power amplifiers transmit radio-frequency (RF) signals at a transmission (Tx) rate and a Tx power level. A receiver circuit receives RF signals, decodes the received RF signals and provides one or more Tx status feedbacks. A rate-control module adjusts the Tx rate based at least on a channel condition. A probing engine generates at least two consecutive frames at a first Tx power level, and a second Tx power level in response to a trigger causes the transmitter to transmit the at least two consecutive frames, and processes respective Tx status feedbacks received in response to transmission of the two consecutive frames in order to optimize the Tx power of the transmitter.

Rate control with transmitter power optimization

An apparatus includes a demapper to receive a number of bit streams received by multiple radio-frequency (RF) antennas. The demapper can compute a first reliability metric associated with a first stream and a second reliability metric associated with a second stream. A channel decoder processes the first and the second reliability metrics to recover decoded data. The demapper is a reduced complexity demapper and uses a symbol subset of the first stream to compute, by employing look-up tables, the second reliability metric for the second stream.

Reduced complexity soft demapper for multi antenna communication system

An apparatus includes a demapper to compute a reliability metric associated with a number of bit streams received by multiple radio-frequency (RF) antennas. The apparatus further includes a channel decoder in a feedback loop with the demapper to process the reliability metric and to provide a feedback signal to the demapper. The demapper is an iterative demapper and can use a symbol subset of at least a first stream of the plurality of bit streams and the feedback signal to compute the reliability metric for a second stream of the plurality of bit streams.

Maximum a posteriori iterative demapper for multi antenna communication system

High peak-to-average ratio of OFDM signals requires large back-off from an RF power amplifier's saturation power. A spectral shaper device therefore increases the output power and efficiency of the power amplifier. The shaper device performs linearization through digital predistortion, based on an out-of-band regrowth limit, as well as the EVM requirement for a particular data rate. The shaper can distribute the error energy, precisely, over frequencies such that each of the inband and out-of-band requirements is independently and individually met. The shaper distributes error energy to frequency regions in the spectrum to the maximally allowed by the standards and regulations, while not increasing the total error. The error energy is kept to the minimum where it is crucial in meeting EVM requirements. In this way, the shaper maximizes the allowable output power of the nonlinear power amplifier.

Time domain transmitter signal shaping

A device includes circuitry configured to determine one or more signal processing capabilities of another device in communication with the device. The device configures a signal compression mode of the device to correspond to a first signal compression mode of a plurality signal compression modes based on the one or more signal processing capabilities of the other device. The device s configured to modify, in response to detecting variations in one or more network configuration properties or the one or more signal processing capabilities of the other device, the signal compression mode of the device.

System, device, and method for multi-mode communications

A modulator and demodulator pair may switch configurations without introducing errors as a result of the switch. Different configurations may, for example, correspond to different symbol rates and/or different amounts of controlled inter-symbol interference (ISI) introduced to the transmitted signal. For example, a first configuration may use be a near-zero ISI configuration (e.g., using Nyquist signaling) and a second configuration may introduce a significant (e.g., amount that would result in errors above a desired threshold if demodulation relied on symbol-by-symbol slicing) but controlled amount of ISI (e.g., using partial response or faster-than-Nyquist-rate signaling). Switching between modulator/demodulator configurations may be needed to maintain a stable link in the case of dynamic channels. At any given time, a modulator and demodulator pair may, for example, switch to a configuration that provides maximal throughput for the current channel conditions.

Dynamic configuration of modulation and demodulation

A transmitter may comprise a symbol mapper circuit and operate in at least two modes. In a first mode, the number of symbols output by the mapper circuit per orthogonal frequency division multiplexing (OFDM) symbol transmitted by said transmitter may be greater than the number of data-carrying subcarriers used to transmit the OFDM symbol. In a second mode, the number of symbols output by said mapper circuit per orthogonal frequency division multiplexing (OFDM) symbol transmitted by said transmitter is less than or equal to the number of data-carrying subcarriers used to transmit said OFDM symbol. The symbols output by the symbol mapper circuit may be N-QAM symbols. While the circuitry operates in the first mode, the symbols output by the mapper may be converted to physical subcarrier values via filtering and decimation prior to being input to an IFFT circuit.

Multi-mode orthogonal frequency division multiplexing transmitter for highly-spectrally-efficient communications

A system that includes combiner circuitry configured to combine a first signal and a second signal to generate a third signal, wherein said third signal is output for transmission onto a communication medium. The system also includes nonlinearity modeling circuitry configured to model a nonlinear response of a nonlinear circuit, and generate a fourth signal through nonlinear distortion of a fifth signal using said model. The system also includes bin modification circuitry configured to generate said second signal through application of one or more weighting factors to frequency bins of said fourth signal, or of a transformed version of said fourth signal, and determine said weighting factors based on a difference, or squared difference, error metric.

Transmitter signal shaping

A receiver comprises a sequence estimation circuit and a soft-input-soft-output (SISO) decoder. The sequence estimation circuit comprises circuitry operable to generate first soft bit decisions for symbols of a received inter-symbol-correlated signal. The SISO decoder comprises circuitry operable to decode the first soft bit decisions to generate corrected soft bit decisions. The circuitry of the sequence estimation circuit is operable to generate, based on the corrected soft bit decisions, second soft bit decisions for the symbols of the received inter-symbol-correlated signal, which are improved/refined relative to the first soft bit decisions.

Reception of inter-symbol-correlated signals using symbol-by-symbol soft-output demodulator

A transmitter may be operable to generate a sequence of symbols which may comprise information symbols and one or more pilot symbols. The transmitter may transmit the information symbols at a first power and transmit the one or more pilot symbols at a second power. In instances when a particular performance indicator is below a determined threshold, the first power may be set to a first value and the second power may be set to zero value. In instances when the particular performance indicator is above the determined threshold, the first power may be set to a second value and the second power may be set to a non-zero value. A value of the first power and a value of the second power may be based on an applicable average power limit determined by a communications standard with which the transmitter is to comply.

Pilot symbol generation for highly-spectrally-efficient communications

A transmitter comprises a symbol mapper operable to map a frame of bits to a frame of symbols, where the symbols correspond to a determined modulation scheme, and circuitry operable to convert the frame of symbols to a physical layer signal and transmit the physical layer signal onto a communication medium. The circuitry is operable to process the physical layer signal such that a first portion of the physical layer signal is a first type of signal (e.g., a linear signal and/or non-ISC signal) and a second portion of the physical layer signal is a second type of signal (e.g., nonlinear signal and/or ISC signal). The first portion of the physical layer signal may comprise a header, a preamble, and/or a payload of the frame. The second portion of the physical layer signal may comprise a header, a preamble, and/or a payload of the frame.

Signal acquisition in a multimode environment

A receiver receives an inter-symbol correlated (ISC) signal with information symbols and a corresponding parity symbol. Values of information symbols are estimated utilizing parity samples that are generated from the parity symbols. One or more maximum likelihood (ML) decoding metrics are generated for the information symbols. One or more estimations are generated for the information symbols based on the one or more ML decoding metrics. A parity metric is generated for each of the one or more generated estimations of the information symbols. The parity metric is generated by summing a plurality of values of one of the generated estimations to generate a sum, and wrapping the sum to obtain a parity check value that is within the boundaries of a symbol constellation utilized in generating the information symbols.

Method and system for forward error correction decoding with parity check for use in low complexity highly-spectrally efficient communications

A receiver may be operable to receive an inter-symbol correlated (ISC) signal, and generate a plurality of soft decisions as to information carried in the ISC signal. The soft decisions may be generated using a reduced-state sequence estimation (RSSE) process. The RSSE process may be such that the number of symbol survivors retained after each iteration of the RSSE process is less than the maximum likelihood state space. The plurality of soft decisions may comprise a plurality of log likelihood ratios (LLRs). Each of the plurality of LLRs may correspond to a respective one of a plurality of subwords of a forward error correction (FEC) codeword.

Reduced state sequence estimation with soft decision outputs

A transmitter may comprise a symbol mapping circuit that is configurable to operate in at least two configurations, wherein a first of the configurations of the symbol mapping circuit uses a first symbol constellation and a second of the configurations of the symbol mapping circuit uses a second symbol constellation. The transmitter may also comprise a pulse shaping circuit that is configurable to operate in at least two configurations, wherein a first of the configurations of the pulse shaping circuit uses a first set of filter taps and a second of the configurations of the pulse shaping circuit uses a second set of filter taps. The first set of filter taps may correspond to a root raised cosine (RRC) filter and the second set of filter taps corresponds to a partial response filter.

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Savyon, Israel

Amir Dov Eliaz