Samsung Electronics Co., Ltd.

Ami Ma

Changwook Jeong

Sunghee Lee

Min-Chul Park

Jisu Ryu

Wooyoung Cheon

Jaehoon Jeong

Hyeonkyun Noh

Kyubaik Chang

QHwan Kim

Jaeyoon Kim

A semiconductor wafer fault analysis system includes: a database to store a first reference map, which is classified as a first fault type, and a second reference map, which is classified as a second fault type; a first auto-encoder/decoder to remove a noise corresponding to the first fault type from the first reference map to generate a first pre-processed reference map; a second auto-encoder/decoder to remove a noise corresponding to the second fault type from the second reference map to generate a second pre-processed reference map; and a fault type analyzer. The database is updated based on the first and second pre-processed reference maps, and the fault type analyzer is to classify a fault type of a target map based on the updated database. The target map is generated by measuring a target wafer.

Semiconductor wafer fault analysis system and operation method thereof

Growing community of inventors

Suwon-si, South Korea

Ami Ma