Lsi Corporation

Lsi Logic Corporation

Amar Amin

Chok J Chia

Maurice O Othieno

Michael O Jenkins

Jeffrey A Hall

Shawn Nikoukary

Abiola A Awujoola

Leonard Mora

Clifford R Fishley

Abiola Awujoola

Maurice Othieno

An integrated circuit package substrate includes a first and an additional electrically conductive layer separated from each other by an electrically insulating layer, a contact pad formed in the first electrically conductive layer for making a direct connection between the integrated circuit package substrate and a printed circuit board, and a cutout formed in the additional electrically conductive layer wherein the cutout encloses an area that completely surrounds the contact pad for avoiding parasitic capacitance between the additional electrically conductive layer and the printed circuit board.

Methods for avoiding parasitic capacitance in an integrated circuit package

Embodiments of the invention include a semiconductor integrated circuit package that includes a substrate which can have an integrated circuit die attached thereto. The package includes a dedicated high-speed ground plane that is electrically isolated from the ground plane used to ground the low speed circuitry of the package.

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Device for avoiding parasitic capacitance in an integrated circuit package

An integrated circuit package includes a package substrate, a die attach pad formed on the package substrate for securing a die to the package substrate, a ground bonding ring formed on the package substrate for attaching core and I/O ground bond wires between the die and the package substrate, and a first plurality of bond fingers formed immediately adjacent to the ground bonding ring for attaching a first set of I/O signal bond wires between the package substrate and the die.

Wire bond integrated circuit package for high speed I/O

Growing community of inventors

Milpitas, CA, United States of America

Amar Amin