Rca Inc.

Samsung Electronics Co., Ltd.

Sarnoff Corporation

Rca Licensing Corporation

Alvin R Balaban

Steven A Steckler

Chandrakant Bhailalbhai Patel

Leopold A Harwood

Walter H Demmer

Christopher H Strolle

Ronald E Fernsler

Jung W Ko

Jung-Wan Ko

Jack R Harford

Werner F Wedam

Michael Louie Low

Edward Coley Fox

A digital AGC arrangement is responsive to the absolute value of a digital signal whose amplitude is to be gain controlled to generate an error signal. The digital value of the error signal is converted to an analog signal by a high-gain digital element such as a pulse width modulator or a comparator controlling a current source. The output thereof is filtered and applied to the gain control input of an amplifier whose gain is to be controlled thereby. This AGC is useful, for example, in a television receiver that includes an RF tuner, IF SAW filter and IF amplifier to receive television signals in both analog format, such as the NTSC, PAL and SECAM formats, and in digital format, such as the ATSC and DVB formats. IF signals from the IF amplifier are sub-sampled to digital signal form and are utilized for AGC, in addition to being processed by respective analog format and digital format processors.

Digital automatic gain control, as for a receiver

A receiver requiring only a single IF SAW filter and IF amplifier receives signals in both analog format and in digital format, such as the NTSC, PAL and SECAM analog television signal formats and the ATSC and DVB digital television signal formats. IF signals from the IF amplifier are sub-sampled to digital signal form and are processed by respective analog format and digital format processors. Control circuitry responsive to the presence of certain unique components of the signals in analog format and digital format determine which of the analog format and digital format processors is producing valid data and selects the valid data to be utilized. In a television receiver, the unique components of the signals may include carrier signals, synchronization signals, pilot signals and symbol timing, and valid data is applied to a television display.

Receiver for analog and digital television signals

A video recording/playback system includes in its recording electronics time-base correctors both for luma signal and for color-under signal, the time-base corrector for luma signal being used to facilitate comb filtering and the time-base corrector for chroma signal being used to maintain luma/chroma tracking during recording. The video recording/playback system includes in its playback electronics time-base correctors both for played-back luma signal and for played-back color-under signal, the time-base corrector for played-back luma signal being used to facilitate comb filtering and the time-base corrector for played-back chroma signal being used to maintain luma/chroma tracking during playback. With appropriate switching, the same pair of time-base correctors can be used in both the recording and the playback electronics of a video recording/playback system. A detector in the recording electronics determines when there is substantial time-base error in the video signal received for recording and conditions the comb filtering of the luma signal during recording to be carried out in just the spatial domain and not in the frame-to-frame time domain. The recording electronics includes circuitry for signaling the playback electronics, via a recorded signal, that the comb filtering of the luma signal during recording was carried out in just the spatial domain and not in the frame-to-frame time domain. The playback electronics responds to such signaling to adapt the comb filtering of the played-back luma signal to suit.

Time-base correction in a video recording/playback system

In a television receiver a downconverter responding to a selected television signal respectively supplies its first and second output signals as the input signals of first and second IF amplifiers, respectively. The downconverter includes a local oscillator for generating oscillations at a frequency controlled in response to the AFT signal. The first IF amplifier includes a first adjacent-channel sound carrier trap, in consequence whereof the first-IF-amplifier response is substantially reduced for the downconverted picture carrier, and an in-channel sound carrier trap. Responsive to the first-IF-amplifier response, a video detector generates a composite video signal in which sound beats are suppressed to relatively low level by the first adjacent-channel sound carrier trap. A second IF amplifier includes a second adjacent-channel sound carrier trap The second-IF-amplifier response, from which in-channel sound carrier is not trapped, is not as much reduced for the downconverted picture carrier by the second adjacent-channel sound carrier trap as the first-IF-amplifier response is by the first adjacent-channel sound carrier trap. From the second-IF-amplifier response, intercarrier detection circuitry detects an intercarrier-sound-IF response, which is amplified by an intercarrier sound-IF amplifier and then detected by an FM sound detector. Responsive to the second-IF-amplifier response, an automatic fine tuning (AFT) detector generates the AFT signal used to control the frequency of the oscillations generated by the local oscillator that the downconverter includes.

Video IF amplifier with auxiliary IF amplifier for intercarrier sound &

A video recorder for recording composite video signals includes an analog to digital converter for digitizing samples of the composite video signal being recorded. A sync separator separates horizontal synchronizing information from the composite video signal being recorded. Filtering separates the chrominance information portion of the composite video signal being recorded, and a down-converter mixes that separated chrominance information with a nervous carrier signal thereby to generate a color-under signal. A controlled oscillator generates a succession of pixel clock signals at a rate the frequency and phase of which are determined in accordance with an oscillator control signal, the rate being more than twice the frequency of the nervous carrier signal and setting the rate of the sampling by the analog to digital converter. A counter counts the number of pixel clock signals supplied by the controlled oscillator, and a frequency divider divides the count by a prescribed factor. A discriminator determines when the resulting submultiple of the count differs in frequency or phase from the horizontal synchronization separated from the composite video signal being recorded, to develop an error signal that is low-pass filtered to generate the oscillator control signal. This completes a phase-lock loop connection including the controlled oscillator, the counter, the frequency divider, the discriminator and the low-pass filter, which loop governs sampling during the analog to digital conversion of the composite video signal being recorded. The nervous carrier signal is derived from this same phase-lock loop.

Nervous clock signal generator for video recorder

In a video cassette recorder (VCR) including a video signal processing system having a source of a reference signal having a first frequency of 2.517 MHz, a clock signal generating circuit comprises a first frequency multiplier circuit of a balanced modulator type, having an input coupled to the source of a reference signal and having an output for providing a signal including a component having a second frequency of twice the first frequency. A filter arrangement has an input coupled to the output of the first frequency multiplier circuit, has an output, and has a response characteristic peak substantially at the second frequency. A second frequency multiplier circuit of a balanced modulator type, has an input coupled to the output of the bandpass filter arrangement and has an output for providing a signal including a component having a third frequency of twice the second frequency.

Method and apparatus for generating a playback clock from a 2.5 MHz

A horizontal phase detector of a television apparatus receives an analog composite video signal that is sampled and digitized at a rate determined in accordance with a clock signal. The leading edge of a simulated sync pulse signal is computed from the digitized signal using interpolation. The phase detector also receives a second signal that is indicative of a transition edge of a horizontal oscillator signal. The timing of the transition edge is contained in first and second signal parts. The first part is a periodic signal having a transition edge coincident with that of the clock signal, and the second part is a skew signal that represents a fraction of the period of the clock signal. The leading edge of the computed sync pulse signal is phase-compared with the oscillator transition edge to generate a phase difference signal for synchronizing horizontal oscillator operation.

Phase detector

A digital television receiver, having a line locked clock, includes a first digital phase locked loop which regenerates quadrature phase related subcarrier signals that are used to synchronously demodulate the chrominance signal components of composite video signals into color information signals. When nonstandard video signals (e.g., from a video tape recorder) are processed by the receiver, frequency instabilities in the line locked clock signal may cause the color information signals to be distorted. To compensate for this distortion, a second phase locked loop is synchronized to a reference signal generated by an analog oscillator. The analog reference signal is linearly added to baseband analog video signals provided by a tuner. The combined signals are digitized by an analog-to-digital converter and then filtered by parallel low-pass and band-pass filters to develop digital signals representing the video signals and the reference signal, respectively. The digital reference signal is used to synchronize the second phase locked loop, the control signals of which are used to compensate the first phase locked loop for frequency instabilities in the clock signal.

Frequency division multiplexed analog to digital converter

A digital television receiver which uses a line-locked clock signal employs chrominance signal demodulation circuitry which produces a digital oscillatory signal that is locked in phase to the color reference burst signal component of the incoming video signals. An analog voltage controlled oscillator generates an oscillatory signal having a frequency of approximately twice the color subcarrier frequency. This signal is combined with the composite video signals and the combined signal is digitized by an analog to digital converter. The digitized oscillatory signal is separated from the combined digital signal and is used to synchronize a digital phase locked loop. The digital phase locked loop generates two quadrature phase related signals having frequencies that are one-half the frequency of the analog oscillatory signal. These two signals are used to synchronously demodulate the chrominance signal components of the incoming video signals to obtain two quadrature phase related color difference signals. The control signal for the voltage controlled oscillator is generated by subtracting the burst phase of the demodulated color difference signals from a reference phase and integrating the difference.

Chrominance signal phase locked loop system for use in a digital

A sync separator detects, in a corresponding part of the waveform of a video signal, the occurrence of the trailing edge of a corresponding sync pulse, in accordance with the rate of change of the video signal. Information obtained from the sync tip and the back porch portions of the corresponding sync pulse is used for generating a slice level signal. A comparator responsive to the slice level signal separates a sync signal from the video signal.

Sync separator

A sync separator detects the occurrence of a corresponding sync pulse in a corresponding part of the waveform of a composite video signal. The level of the sync tip is used for updating a slice level signal, provided the level of the sync tip is lower than that of the preceding sync tip signal. A time-out signal is generated at the end of a time-out interval that has elapsed from the last time the sync tip signal was updated, provided the sync tip signal was not updated within such time-out interval. The time-out signal is used for updating the sync tip signal. The sync tip signal is updated according to such sync pulse that occurred during the time-out interval, having the lowest level sync tip. Information obtained from the sync tip and back porch portions of the corresponding sync pulse is used for generating a slice level signal. A comparator responsive to the slice level signal separates a sync signal from the composite video signal.

Sync separator with periodic updating

A digital television receiver includes a first phase locked loop which develops a sampling clock signal that is locked to the horizontal line synchronizing signal components of a composite video signal. A second digital phase locked loop is clocked by the sampling clock signal and develops a digital signal that is phase locked to the color burst signal. This digital signal is used as a regenerated color subcarrier signal to synchronously demodulate the chrominance components of the composite video signals into I and Q color difference signals. To compensate for frequency instability in the regenerated subcarrier signal caused by frequency instabilities in the line-locked clock signal, a third digital phase locked loop develops an output signal which is phase locked to a reference signal generated by a crystal controlled oscillator. Control signals from the third phase locked loop are applied to the second phase locked loop to substantially compensate for frequency instabilities in the regenerated subcarrier signal that are induced by the clock signals.

Digital phase locked loop stabilization circuitry using a secondary

A digital phase-lock-loop circuit includes a generator that produces a horizontal rate output signal at a controlled frequency and a phase detector responsive to the output signal and to an incoming synchronizing signal. The phase detector is coupled to the generator control port via a loop filter. When the phase between the output signal and the synchronizing signal that synchronizes the phase-lock-loop circuit changes as a result of, for example, head switching in a two-head VTR that supplies the synchronizing signal, a signal representative of such phase change is produced. The phase change representative signal is fed forward to the generator, by bypassing the loop filter of the phase-lock-loop circuit. The phase change representative signal produces an immediate phase shift of the output signal such that the loop filter is not affected by the head switching.

Phase-lock-loop circuit for a television apparatus

A digital television receiver, having a line-locked clock, includes a partly digital, partly analog phase locked loop. This phase locked loop regenerates two quadrature phase related subcarrier signals that are used to synchronously demodulate the chrominance signal components of the composite video signals into two color informaiton signals. The phase locked loop includes an analog voltage controlled oscillator which generates a signal that is independent of any frequency instability in the line locked clock signal. An analog-to-digital converter digitizes this signal to provide one of the subcarrier signals. This subcarrier signal is applied to a read-only memory to generate the second subcarrier signal. The two color information signals are obtained by multiplying the chrominance signals by the first and second subcarrier signals. A phase comparator determines the phase of the vector sum of the two color information signals and compares this against a desired phase value to generate a phase difference signal. The phase difference signal is filtered and applied to a digital-to-analog converter which provides the frequency control signal for the analog voltage controlled oscillator. In a second embodiment of the invention, a tracking filter is inserted at the output port of the analog-to-digital converter to allow the quantization resolution of the analog-to-digital to be reduced without affecting the performance of the phase locked loop.

Growing community of inventors

Lebanon, NJ, United States of America

Alvin R Balaban