3G. Com, Inc.

Alon Boner

Yoav Lavi

A system and method for improving error detection and correction for transmitted data. An iterative error detection method is used to determine a relative likelihood that decoded data is an accurate representation of the original data. An independent error correction unit operates on the decoded data and a result from the independent error correction unit is injected into the iterative error detection method to improve the reliability of the error detection method.

Mechanism for turbo decoding when CRC for partial blocks is provided

A block interleaver is provided using a relatively small register file and a larger random access memory (RAM). In one embodiment, the size of the RAM is larger than the size of the register file by at least one order of magnitude. As a result, the register file consumes significantly less power than the RAM for similar operations. The register file receives a stream of sequential data values and stores the data values in a column order. The data values are then read from the register file in a row order. The data values read from the register file in a row order are then written to the RAM in a row order. The data values are then read from the RAM in a row order, thereby creating an interleaved data stream. In a particular embodiment, the data values are written to the RAM in a staggered row order and read from the RAM in a sequential row order. All accesses to the RAM are performed using the full width of the RAM, such that no unnecessary power is used to access the RAM. The register file consumes significantly less power than the RAM, thereby providing an overall power savings for the interleaving process. In different embodiments, the register file can be a single-port device or a dual-port device. A similar block de-interleaver is provided in another embodiment.

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Ramat Poleg, Israel

Alon Boner