Philips Electronics North America Corporation

North American Philips Corporation

Alma Stephenson Anderson

Schuyler E Shimanek

Brian C Martin

Jerome E Liebler

Harold Garth Hanson

David William Oehler

In a power converter for supplying a controlled output from an input supply, a plurality of transfer devices is used to selectively couple the input supply to a distribution of storage devices. In a high-current mode, each of the transfer devices and associated storage device is used to couple the input supply to the controlled output. In a minimal-current mode, each of the transfer devices and associated storage device is selectively disabled until only one transfer device and storage device is utilized, and this remaining device may also be selectively disabled. Because the storage devices are distributed, each storage device can be smaller than that required for the high-current operation, thereby minimizing the losses associated with high-current switching converters during low-current operation. In another aspect of this invention, the plurality of transfer devices is operated at different phases to one another, thereby reducing the ripple associated with high-current operation. In another aspect of this invention, the storage devices are each sized for efficient operation at a given load level.

Sleep-mode-ready switching power converter

An output driver circuit for coupling a logic circuit to load includes an input node, an output node for coupling to the load and a pull down switch which discharges the output node in response to a signal received at the input node. A current sink circuit includes a feeder transistor which provides current to the control terminal of the pull down switch to render the pull down switch conductive when the voltage at the output node exceeds a first threshold value between a logic high and a logic low. The feeder transistor is charged by a first charging path having a first impedance by which it takes a first time period to render the pull down switch conductive, the first impedance providing a low standby current when the voltage at the output node is below about the first value. A jump start circuit having a second current path with a lower impedance than the first current path charges the control terminal of the feeder transistor to said threshold faster than said first path and is disabled when the voltage at the output node falls below about the first value, thereby saving power.

Output driver circuit with jump start for current sink on demand

Output overvoltage protection circuitry for circuits operating at low voltages (e.g., 3 v) interfacing to a higher voltage operating circuit (e.g., 5 v bus). To prevent problems with a pull-up PMOS device at the output when the bus is pulled-up to the higher voltage, a voltage node is provided in the circuit which follows the output voltage or the low supply voltage, whichever is higher, and a sub-circuit is provided to generate logic signals indicating when the bus is pulled too high. The PMOS device is then shut-down to prevent damage to the circuit.

Overvoltage control circuitry

A programmable logic device (PLD) integrated circuit containing an array of fuse or anti-fuse links includes verification circuitry configured to classify link resistances after programing into three resistance zones, corresponding to a 'closed' state zone, an 'open' state zone and a 'forbidden' state zone intermediate the 'closed' and 'open' state zones. Two reference resistance values, namely a lower reference resistance value and the higher reference resistance value, divide the entire range of possible link resistance values into the aforementioned three resistance zones. Because the ratio between the higher reference resistance value and the lower reference resistance value is typically more than 50, the verification circuitry includes a switchable two level current source that produces a voltage across the link of correct dynamic range. A measurement voltage produced in response to the link voltage is compared by a pair of differential comparators to respective lower and higher reference voltages, the lower reference voltage corresponding to the measurement voltage that would be produced by a higher link voltage that is the product of the higher reference resistance value and the lower current level, and the higher reference voltage corresponding to the measurement voltage that would be produced by a lower link voltage that is the product of the lower reference resistance value and the higher current level.

Growing community of inventors

Rio Rancho, NM, United States of America

Alma Stephenson Anderson