General Instrument Corporation

Allen Wu

Woo H Paik

Edward A Krause

Scott A Lery

Digital video signals are adaptively compressed for communication to a receiver. Superblocks, each containing a plurality of blocks of digital video data, are compressed using PCM, DPCM with a general motion vector for the entire superblock, and DPCM with a specific motion vector for each block contained within a superblock. The result of each compression mode is compared after accounting for overhead data, to determine which results in the least amount of data for each block. These blocks are assembled into a superblock, and compared together with necessary overhead and motion vector data to the same superblock processed using all PCM as well as the superblock processed using all DPCM. The comparison determines which compression mode produces the least amount of data for the superblock. The most compact superblock is selected for transmission. The transmitted superblocks are decoded by a decoder that recovers the necessary motion vectors and overhead information which identifies the type of compression used to provide the superblock.

Adaptive compression of digital video data using different modes such as

A two stage accumulator is provided for updating coefficients. The accumulator is particularly useful in an adaptive equalizer. A first stage of the accumulator receives an error word and outputs sign and carry bits resulting from the addition of the error word and an N-bit LSB portion of a larger M-bit coefficient. A second stage is responsive to the sign and carry bits for updating the (M-N) MSB's of the M-bit coefficient. New error words are cyclically provided to the first stage during successive coefficient update cycles. The first stage can be implemented using an N-bit twos complement adder. The second stage can be implemented using an up/down counter. A leakage function is provided by causing the up/down counter to periodically skip over increment and decrement cycles.

Two stage accumulator for use in updating coefficients

Convergence of a complex adaptive equalizer used in digital communications is substantially improved by updating all coefficients of the equalizer during each filter clock cycle. Complex signal data is passed through a plurality of successive delay stages to provide N sets of delayed complex signal data. The product of each set and a complex error signal is obtained. Each product is concurrently updated with previous product data for the set to provide N sets of updated complex coefficients for selective input to equalizer filters. In an illustrated embodiment, the updated coefficients are truncated and their gain is adjusted prior to input to the filters. The updated coefficients can be multiplexed to provide a clocked stream of coefficient sets for input to the equalizer filters. A VLSI implementation of the equalizer is also disclosed.

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Allen Wu