Tektronix, Inc.

Other

Allen L Hollister

John T Armstrong

Gary Barta

Philip S Crosby

Arnold M Frisch

Larry L Hutchinson

Edward L Reuss

A system comprising an RFID Reader and an array of RFID Tags, where the tags have the ability to measure physical signal properties such as FM deviation and Received Signal Strength as examples and use these measurements to create a means to refrain from responding to the Reader, unless the measured values fall inside a range determined by a built in algorithm or decision tree or by the Reader and transmitted to the array of Tags in an outbound message. The system may also use non-physical parameters, including tokens sent by the Interrogator/Reader to the Tag field. Moreover, physical parameters may be divided into maskable and unmaskable parameters. Signal frequency is not maskable by the environment, for example, but signal amplitude and phase are maskable by the environment during propagation. Additionally, the number, the nature and the range of each Multidimensional Variable are set by the Interrogator at the start of a session. In this way, foreknowledge or good estimates of the tag population will lead to higher efficiency operation.

Multidimensional sieving for high density low collision RFID tag fields

A method is presented for taking an unknown field of transponders and converting them to a slotted Aloha architecture and increasing the throughput allowed by the slotted Aloha architecture by using several different techniques including shortening the time of empty and collided timeslots, implementing a unique random number generator that creates random numbers that are uniquely based on an individual tags location, and on an ability to estimate the total number of transponders and control the offered rate such that throughput is always maximum. While these techniques work well together and produce the most benefit when used together, they are independent techniques and any one may be used alone without the others. Thus a system might use the estimated total number of transponders technique and the timeslot shortening technique, but use a standard random number generator rather one based on transponder location with only a small decrease in overall performance.

Method of communicating in a radio frequency identification system using aloha networks

A method and system for reading RFID tags in a high-density environment using a directional scanning antenna system is provided. The directional scanning antenna system consists of transmit and receive antennas having highly directional antenna patterns which work together to read and locate the tags. In operation both types of antennas are stepped in a circular fashion with respect to each other wherein the transmit antenna's antenna pattern pauses during rotation while the receive antenna pattern sweeps across the radiating antenna's path produced by the transmit antenna such that the antenna patterns produced from each isolate and determine the location of the tags.

Method for reading RFID tags using directional antennas

A level detecting waveform digitizer for repetitively sampling an analog waveform and converting analog samples into representative digital data is provided with a predictive time base circuit for accurately controlling sample timing with respect to a triggering event in the input waveform and a comparator for indicating when the magnitude of the waveform as indicated by the digital data exceeds a predetermined level. The digitizer also includes a counter for counting samples taken and a second comparator for indicating when the sample count reaches a predetermined limit.

Level detecting waveform sampling system

A predictive time base control circuit for a waveform sampling system of the type which converts a sequence of analog waveform samples into a sequence of digital quantities for storage in an addressable acquisition memory. The time base circuit generates a sampling control signal which initiates sampling at the end of a time interval of programmable duration following detection of a triggering event in the waveform, and which maintains sampling thereafter at regular intervals. The time base circuit permits the sampling system to operate in an equivalent time mode in which repetitive waveform sections are sampled at progressively skewed sampling intervals with respect to a repetitive triggering event. The sampling control signal is also frequency divided, delayed, and then applied as a write control signal to the sampling system acquisition memory. The time base control circuit includes a memory addressing circuit responsive to the write control signal for incrementing the address of the acquisition memory by an adjustable step size each time data is stored in the memory, thereby facilitating proper ordering of sample data in the memory.

Predictive time base control circuit for a waveform system

A waveform digitizer includes a sampling bridge for producing a sequence of analog samples of an input waveform, the samples being calibrated by an amplifier having adjustable offset and gain and then converted to digital quantities for storage in an addressable memory. The digitizer also includes memory and time base control circuits permitting real and equivalent time sampling of repetitive waveforms and logic circuits providing hardware averaging of multiple data samples.

Method and apparatus for digitizing a waveform

A signal generator for producing a triggered output signal of digitally controlled phase and frequency includes a skewing circuit for producing an output clock signal of the same period, T, as an input, triggered reference clock signal but which is phase skewed from the reference clock signal by a phase angle, P, of 0 to 360 degrees as determined by input digital data. The skewed clock signal is frequency divided by an integer factor N, and a timing circuit counts reference clock periods to initiate frequency division a programmable delay time (J.times.T seconds) following triggering of the reference clock signal, where J and N are integers also determined by input digital data. An AND gate qualifies the frequency divided skewed clock signal with the skewed clock signal itself to produce a periodic output signal of digitally controlled frequency N/T, the first pulse of which is delayed following triggering of the reference signal by a digitally controlled interval of (T.times.J)+(P.times.T/360) seconds.

Triggered, programmable skew signal generator

A computer-based instrument system is provided for progammably configuring a variety of computer-based test instruments for performing a variety of tests and permitting high speed execution of tests through concurrent operation of individual test instruments. The instruments are implemented on circuit boards and mounted in a chassis including permanent backplane wiring interconnecting the instruments and a timing and triggering control unit. The backplane wiring includes a conventional computer bus for carrying instructions from a master controller to each instrument and lines for a common system clock signal, protocol signals, and trigger signals between selected instruments and the timing and triggering control unit for synchronizing the operation of the instruments when performing a test. The timing and triggering control unit is adapted to programmably control instrument triggering according to individual test requirements without modification of backplane wiring. The backplane wiring further includes a high speed data bus for rapidly transferring data between instruments in the course of a test.

Computer-based instrument system

An oscillator produces an output signal which is frequency locked to a reference signal but phased locked to a triggering signal. The oscillator includes a NOR gate having its output fed back to one of its inputs through a programmable delay circuit while the triggering signal is applied to another of its inputs. When enabled by the triggering signal, the output signal of the NOR gate oscillates at a frequency inversely proportional to the delay time of the delay circuit. The delay time is controlled by a control circuit which counts NOR gate output signal cycles occurring during a predetermined number of reference signal cycles and increments the delay time when the count is higher than expected for an oscillator output signal of a desired frequency and decrements the delay time when the count is lower than expected.

Triggered frequency locked oscillator having programmable delay circuit

A digital acquisition system includes a high-speed sampling gate with analog memory for sampling input signals. The samples are converted to digital representations and stored in a digital memory. The digital representations are selectively recalled from the digital memory and fed back as estimators to the sampling gate's analog memory. Since the estimators are essentially the previous samples for each point of a given waveform, the stored waveform converges to the input waveform very quickly, facilitating accurate waveform replication. Embodiments for both sequential sampling and pseudo-random sampling are provided. Operational techniques of the digital acquisition system include noise reduction, loop gain determination, adaptive filtering and signal averaging.

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Beaverton, OR, United States of America

Allen L Hollister