Network Appliance, Inc.

Allen Kilbourne

Steve Valin

Brad A Reger

R Guy Lauterbach

Mark W Insley

Volatile memory is placed into a data-preserving safe state in a computer system in response to any one of a reduction in power applied to the volatile memory, a bus reset signal on a data communication bus of the computer system, and an absence of a bus clock signal on the bus. The volatile memory is powered from an auxiliary uninterruptible power supply in response to the reduction in power. The volatile memory is also placed into the data-preserving safe state in response to a cessation in executing software instructions by a CPU of the computer system. Placing the volatile memory into the safe state in response to and under these conditions enhances the opportunity to preserve data in response to error and malfunction conditions.

Method and apparatus to establish safe state in a volatile computer memory under multiple hardware and software malfunction conditions

A suspended or stuck condition of a serial bus controller is released by applying an artificial clock signal to the stuck bus controller in place of the normally applied clock signal. The artificial clock signal causes the stuck controller to advance in a communication transaction which was in progress when the stuck condition occurred, until a data signal is supplied at a logical level which permits the initiation of another transaction in accordance with the serial communication protocol of the bus. The ability to release the stuck condition avoids losing important data and other information that would be lost if the stuck condition was released by performing a reset of the stuck controller or the component to which it is connected.

Method and apparatus to release a serial bus from a suspended state

A general-purpose personal computer is converted into a dedicated mass storage appliance, and a mass storage operating system for performing mass data storage functions is booted from a solid-state, nonvolatile memory card in response to BIOS boot probe signals. The memory card emulates a disk drive for booting purposes, so the BIOS need not be modified to incorporate chain booting. A relatively low latency intermediate memory reads and writes data from a primary expansion bus of the personal computer, and the intermediate memory is separately backed up with power to sustain the data upon a reduction in power, a reset signal, or the absence of a bus clock signal. The conversion may be accomplished by inserting a conversion card into a bus slot of a primary expansion bus of the personal computer.

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Tracy, CA, United States of America

Allen Kilbourne