Other

Maxim Integrated Products, Inc.

Phyworks Limited

Allard Van Der Horst

Chris Born

Andrew Sharratt

Ben Willcocks

Miguel Marquina

Gordon Faulds

A method for processing a received digital signal includes generating a clock signal used for sampling the received signal by comparator which compares the received signal to a reference. A phase shifter adjusts the phase of the first clock signal to maximize the vertical eye opening of the signal at the sampling time. The phase of the clock signal may be adjusted in a first direction and a measure of vertical eye opening of the signal compared to a previous measure. If the measure of vertical eye opening has increased the signal another phase adjustment may be made in the same direction whereas if the vertical eye opening of the signal has decreased a further phase adjustment in the opposite direction may be made.

Digital signal sampling method

Methods and apparatus adapting equalizers for compensating for signal distortion of a received digital signal are disclosed. The method comprises deriving equalizer settings for a received signal, determining at least one signal parameter of said received signal; and storing the derived equalizer settings together with an indication of the signal parameter. The signal parameter could, for instance, comprise the data rate of the signal. If the signal parameter changes the equalizer is configured to use any stored settings which are appropriate for the new signal parameter. Thus, rather than start an entirely new equalizer adaptation routine every time the signal parameter changes the equalizer will use any stored settings which are appropriate for the changed parameter.

Improvements relating to equalizers

A clock generator generates a clock signal used for sampling a received signal by a comparator which compares the received signal to a reference. A phase shifter adjusts the phase of the first clock signal and a controller adjusts the phase of the clock signal to maximize the vertical eye opening of the signal at the sampling time. In an example embodiment, the phase of the clock signal is adjusted in a first direction and a measure of vertical eye opening of the signal is compared to a previous measure. If the measure of vertical eye opening has increased the signal another phase adjustment is made in the same direction and if the vertical eye opening of the signal has decreased a further phase adjustment in the opposite direction is made. By increasing the vertical eye opening of the signal the signal-to-noise ratio of the received signal is improved.

Digital receivers

An example method for generating bus addresses for slave devices on a two wire interface bus includes providing a base address to each of N slave devices connected to the two wire interface bus and providing a sequence of N&#x2212;1 clock pulses to each of the N slave devices to provide unique bus addresses. Circuitry within each of the example slave devices is operative to receive a base address followed by a plurality of clock pulses from the host device and to increment the base address by a digital integer. Circuitry within each of the example slave devices is further operative to terminate incrementing of the base address when an inhibit logic signal is detected at the slave program input and to save an address resulting from incrementing the base address as a bus address subsequent to terminating the incrementing of the base address.

System and method for automatically assigning bus addresses to slave devices

This invention relates to methods and apparatus for equalizer adaptation for compensating for channel distortion on received data signals. The method comprises, for each bit, forming an adjusted bit signal comprising a weighted contribution from at least one other bit period. The polarity of the adjusted bit signal is determined and the bit is categorized as a hard, i.e. high confidence, bit is the bit is above an upper threshold or below a lower threshold or otherwise is categorized as a soft bit. The weightings are adjusted based on the category of the bit wherein a first adjustment is made it the bit is categorized as a soft bit but a second, different adjustment is made if the bit is categorized as a hard bit. For a soft bit the weightings may be increased for bits which have the same polarity as the bit in question and decreased for bits of opposite polarity. For a hard bit the adjustment may increase the weighting for bits of opposite polarity and decrease the weighting for bits of the same polarity as the bit in question. The adjustments for the hard and soft bits may be weighted differently according to the proportion of soft to hard bits.

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Monmouthshire, United Kingdom

Allard Van Der Horst