Micro Linear Corporation

Champion Microelectronic Corporation

Micrel, Incorporated

Champion Microelectronics Corporation

Alland Chee

Jeffrey H Hwang

Bruce Lee Inn

John B Sampson

Calvin Hsu

Donald Yu

Systems for and methods of synchronous rectification in a flyback power converter are disclosed. In accordance with an embodiment, a switching power supply comprises a power converter and a controller. The power converter has an inductor, a capacitor and a switching element. The switching element is configured to rectify a current in the inductor for charging the capacitor to form a voltage for powering a load. The switching element comprises a switch and a diode. The controller is configured to control the switching element and to detect a load condition. When the load condition is detected, the controller controls the switching element to actively rectify the current in the inductor for charging the capacitor. When the load condition is not detected, the controller holds the switching the element open such that the current is passively rectified by the diode.

Systems for and methods of synchronous rectification in a switching power converter

A switching power supply comprises one or more power supply stages configured to receive power from an input power source and to generate an output voltage for powering a load by alternately opening and closing a set of switches. An output current sensor is configured to monitor a level of an output current of the switching power supply. The opening and closing of the set of switches is controlled so as to maintain the output voltage at a desired level when the level of the output current is below the threshold and so as to limit the output current when the level of the output current exceeds the threshold.

System and method for limiting output current in a switching power supply

A resonant switching converter comprises a resonant tank having a resonant frequency; a synchronous rectifier coupled to the resonant tank, the synchronous rectifier drawing power from the resonant tank for forming an output voltage; and a controller coupled to the synchronous rectifier for controlling switching of the synchronous rectifier using frequency modulation. The controller operates in a first mode in which the switching of the synchronous rectifier is performed above the resonant frequency of the resonant tank. The first mode employs a duty cycle for the synchronous rectifier. In addition, the controller operates in a second mode in which the switching of the synchronous rectifier is performed below the resonant frequency and the duty cycle of the synchronous rectifier in the second mode is reduced from that of the first mode.

Resonant switching converter having operating modes above and below resonant frequency

A controller for limiting the current through a pass transistor is described herein that includes an NMOS control transistor coupled between the gate of the pass transistor and ground. The gate of the NMOS control transistor is coupled to a bootstrap circuit via a PMOS transistor. The PMOS transistor is turned on in the event of a current limit signal to momentarily apply the bootstrap voltage to the gate of the NMOS control transistor. This quickly turns on the NMOS control transistor to discharge the gate of the pass transistor, shutting off the pass transistor and terminating the high current situation. After the bootstrapped voltage has been shunted to ground, a reverse biased diode allows the gate of the NMOS control transistor to remain charged to keep the NMOS control transistor on. After the current limit situation has passed, the NMOS control transistor is switched off. Accordingly, short circuits in the load are quickly uncoupled from the remainder of the system by the fast reaction time of the NMOS control transistor.

Accelerated turn-off of MOS transistors by bootstrapping

A method and apparatus for controlling the operation of a gas discharge lamp including regulation of power provided to the lamp for maintaining a preselected illumination intensity, automatic lamp shut down for preventing a catastrophic failure of the lamp, and automatic selection of operating frequencies for increasing efficiency and extending useful life of the lamp. An appropriate quality factor Q is achieved by including a low pass filter followed by a high pass filter in the lamp network so as to allow deep dimming of the lamp. Preferably, the arc power delivered to the lamp network is sensed and regulated. By sensing the arc power instead of only the lamp current, the illumination intensity of the lamp is accurately regulated. Further, the lamp ballast is automatically shut down near the end of the lamp's useful life, before operation in partial rectification. Preferably, power to the lamp is shut off based on the arc power entering the lamp network instead of relying only on the voltage of the lamp to avoid unnecessarily shutting down the lamp. The lamp network is automatically operated at an appropriate frequency selected from among a plurality of predetermined frequencies according to the lamp's present mode of operation including: preheating, starting, and continuous operation. Preferably, each frequency is optimized for the particular lamp and for the particular mode of operation.

Controlling gas discharge lamp intensity with power regulation and end of life protection

A two-stage switching regulator having low power modes responsive to load power consumption. A first stage of the regulator is a power factor correction (PFC) stage. A second stage is a pulse-width modulating (PWM) stage. When a load draws a high level of current, switching in both stages is enabled. Under certain conditions, switching in either one or both of the stages is disabled by the duty cycle for the corresponding switch falling to zero. When switching in both stages is enabled, as in a normal mode, switching in the PWM stage is then disabled in response to an error signal falling below a first error threshold. When switching in the PFC stage is enabled and switching in the PWM stage is disabled, as in a first low power mode, switching in the PFC stage is then disabled in response to a feedback voltage rising above a first feedback threshold. When switching in both stages is disabled, as in a second low power mode, switching in the PWM stage is then enabled in response to the error voltage rising above a second error threshold, higher than the first error threshold. When switching in the PFC stage is disabled and switching in the PWM stage is enabled, as in a third low power mode, switching in the PFC stage is enabled in response to the feedback voltage falling below the second feedback threshold. As a result of these low power modes, the switching regulator is highly efficient.

Two-stage switching regulator having low power modes responsive to load

A combination PFC-PWM integrated circuit converter controller having a power factor correction stage and a pulse-width modulation stage. The power factor correction stage provides unity power factor and a regulated intermediate output voltage by sensing a current in the power factor correction circuit and by sensing the regulated intermediate output voltage in a voltage control loop. The regulated intermediate output voltage is sensed by an error amplifier that includes a current mirror. A dc supply voltage for powering the integrated circuit is generated that is representative of the regulated intermediate output voltage. The dc supply voltage is sensed for an overvoltage protection function. By sensing the intermediate regulated output voltage in the voltage control loop and by sensing the dc supply voltage for overvoltage protection, a component failure is less likely to affect both functions than if a single voltage was sensed for both functions. The pulse-width modulation stage waits a predetermined delay time after start up for the output voltage to rise before beginning the pulse-width modulation function. The delay time is determined by an amount of time taken to charge a capacitor to a predetermined voltage after start up. The capacitor is charged by a current source that is switched on and off according to a clock signal such that the capacitor is charged only a portion of time. Therefore, a larger current source may be used than otherwise which results in more reliable control of the delay time.

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Union City, CA, United States of America

Alland Chee