Intel Corporation

Allan Wong

Lance Cheney

Anthony Babella

Ke Yin

Naveen Matam

Brian D Rauchfuss

Wing Hang Wong

Provided are a method and system for activating a design test mode in a graphics card having multiple execution units. A design test mode is activated in a graphics module comprising multiple execution units coupled to a cache on a bus. The bus is configured to return test instructions from the cache to the execution units in response to a request from one execution unit for the test instructions from the cache in the design test mode. The execution units execute the test instructions during the design test mode. Interrupts are prevented during the design test mode.

Activating a design test mode in a graphics card having multiple execution units to bypass a host cache and transfer test instructions directly to an instruction cache

Provided are a method and system for loading test data into execution units in a graphics card to test the execution units. Test instructions are loaded into a cache in a graphics module comprising multiple execution units coupled to the cache on a bus during a design test mode. The cache instructions are concurrently transferred to an instruction queue of each execution unit to concurrently load the cache instructions into the instruction queues of the execution units. The execution units concurrently execute the cache instructions to fetch test instructions from the cache to load into memories of the execution units and execute during the design test mode.

Loading test data into execution units in a graphics card to test execution

Provided are a method and system checking output from multiple execution units. Execution units concurrently execute test instructions to generate test output, wherein test instructions are transferred to the execution units from a cache coupled to the execution units over a bus. The test output from the execution units is compared to determine whether the output from the execution units indicates the execution units are properly concurrently executing test instructions. The result of the comparing of the test output are forwarded to a design test unit.

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Folsom, CA, United States of America

Allan Wong