Intersil Americas Inc.

Renesas Electronics America Inc.

Allan Richard Warrington

Michael Jason Houston

Nicholas Ian Archibald

Vipul Raithatha

Vinod Aravindakshan Lalithambika

Claudio Collura

Neil E Robinson

Rob Cox

Andy LeFevre

DAC control logic for controlling a DAC for supplying a target voltage VTARGET to a switching converter is disclosed. The DAC logic comprises control logic which is configured, in response to DAC ramp-down, to decrement DAC input code supplied to the DAC in a series of steps. The DAC control logic is configured, for at least some of the steps during ramp down, to wait until at least one switching cycle has occurred in the switching converter before decrementing the DAC input code from a current value to a new value.

Device and method for controlling output voltage of a digital-to-analog converter

A method of operating a hysteretic synthetic current-mode switching regulator is disclosed. In the switching regulator, PWM pulses (PWM) are generated by a PWM generator (; FIG.) in dependence upon a ramp voltage (VR) which oscillates between upper and lower window voltages (VW+, VW&#x2212;). The ramp voltage depends on a control voltage (VC) which depends on current (IL) through an inductor (). The method comprise determining whether a period (T) equal to or greater than a given period (TREFRESH) has elapsed without a PWM pulse being generated, upon a positive determination, causing the ramp voltage to be pulled up to or above the upper window voltage (VW+) for a given duration (&#x394;T) and when said given duration has elapsed, causing the ramp voltage to decrease until a rising edge of a PWM pulse is generated.

Method and device for switching regulator control

One or more embodiments relate to a regulation loop control circuit for regulation of a parameter such as an input voltage or output voltage for a buck-boost converter. In these and other embodiments, the regulation loop control circuit is configured to select between an input voltage loop for regulation of the input voltage or an output voltage loop for regulation of the output voltage in response to an input voltage error, an output voltage error, and a threshold detector to protect the converter without sacrificing output voltage regulation and transient response.

Regulation loop control for voltage regulation in a switch mode power supply

One or more embodiments relate to a current limit mode control circuit for a buck-boost converter which can provide a stable switching of the converter by operating the converter in a current limit mode during an overcurrent condition, performing fewer state transitions while in the current limit mode, and/or by clamping (reducing to a lower value) the output of an error amplifier in the current limit mode for controlling a pulse width modulation (PWM) signal that drives the switching transistors.

Current limit mode detection and control in a switch mode power supply

One or more embodiments relate to a reference voltage control circuit for a buck-boost converter. According to certain aspects, embodiments can increase or decrease the reference voltage for an error amplifier for controlling a pulse width modulation (PWM) signal when there is a change in the mode of operation. In these and other embodiments, the reference voltage control circuit is configured to modify the reference voltage by increasing or decreasing the reference voltage when there is a change in the mode of operation, so as to reduce overshoot or undershoot disturbances in the regulated output voltage during such transitions.

Reference voltage control in a switch mode power supply

A circuit for generating an output voltage to a top node of a plurality of LED strings. The circuit includes an inductor having a load current flowing therethrough and a switching transistor responsive to a switching control signal. An integrator generates a compensation voltage responsive to a voltage at a bottom node of the LED string and a reference voltage. Circuitry for combiningana correctionoffset with the compensation voltage is responsive to the compensation voltage and the load current through the inductor.The offset is generated only during a step load change of the load current and substantially reduces voltage transients from the compensation voltage and the output voltage.A summation circuit sums the compensation voltage including thecorrectionoffset with at least the voltage at the bottom node of the LED string to generate a first control signal. A latch generates the switching control signal responsive to the first control signal and a leading edge blanking signal.

Transient suppression for boost regulator

An integrated circuit comprises a control input providing a connection to a capacitor. A delay circuit generates a delayed enable signal responsive to a provided enable signal. A second circuit performs a control function. A switching circuit responsive to the delayed enable signal connects the control input to the delay circuit in a first mode of operation and connects the control input to the second circuit in a second mode of operation.

Dual use delay capacitor

A circuit comprises a plurality of segments and a clamp circuit. Each of the plurality of segments comprises a bond pad coupled to a multi-bonded pin via a respective bond wire and a conductor coupling the bond pad to a respective internal connection. The bond pad from each of the plurality of segments is coupled to the same multi-bonded pin. The clamp circuit comprises a plurality of input pins and a plurality of clamp transistors. Each input pin is coupled to the bond pad of a respective one of the plurality of segments via the respective conductor. Each clamp transistor is coupled to a respective one of the input pins, wherein each of the plurality of clamp transistors is configured to prevent a voltage on the respective conductor from exceeding a respective voltage limit.

ESD clamp for multi-bonded pins

A circuit for generating an output voltage to a top node of a plurality of LED strings. The circuit includes an inductor having a load current flowing therethrough and a switching transistor responsive to a switching control signal. An integrator generates a compensation voltage responsive to a voltage at a bottom node of the LED string and a reference voltage. Circuitry for combining an offset with the compensation voltage is responsive to the compensation voltage and the load current through the inductor. The offset is generated only during a step load change of the load current and substantially reduces voltage transients from the compensation voltage and the output voltage. A summation circuit sums the compensation voltage including the offset with at least the voltage at the bottom node of the LED string to generate a first control signal. A latch generates the switching control signal responsive to the first control signal and a leading edge blanking signal.

An LED driver controller comprises a voltage regulator for controlling an output voltage to a top of a plurality of LED strings responsive to at least a reference voltage. A plurality of first circuitries each associated with a node at a bottom of each of the plurality of LED strings compares a voltage at the bottom of each of the plurality of LED strings with a high reference voltage and a low reference voltage. Control logic generates a first control signal when the voltage at the bottom of each node of the plurality of LED strings exceeds the high reference voltage and generates a second control signal when the voltage at least one of node of the plurality of LED strings falls below the low reference voltage. Second circuitry responsive to the first control signal and the second control signal generates the reference voltage. The reference voltage is controlled to cause the voltage at the bottom of the lowest voltage node of the plurality of LED strings to remain between the high reference voltage and the low reference voltage.

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Chislehurst, United Kingdom

Allan Richard Warrington