University of Texas System

The Texas A&m University System

Allan MacDonald

Sanjay K Banerjee

Leonard Franklin Register, Ii

Emanuel Tutuc

Dharmendar Reddy Palle

Hua Chen

Priyamvada Jadaun

Jiwon Chang

Xuehao Mou

Inti Sodemann

Bhagawan R Sahu

A device or class of devices that provides a mechanism for controlling charge current flow in transistors that employs collective magnetic effects to overcome voltage limitations associated with single-particle thermionic emission as in conventional MOSFETs. Such a device may include two or more magnetic stacks with an easy-in-plane ferromagnetic film sandwiched between oppositely magnetically oriented perpendicular magnetization anisotropy (PMA) ferromagnets. Each stack includes two non-magnetic layers separating the easy-plane ferromagnetic film from the PMA layers. Charge current flow through one of these stacks controls the current-voltage negative differential resistance characteristics of the second stack through collective magnetic interactions. This can be exploited in a variety of digital logic gates consuming less energy than conventional CMOS integrated circuits. Furthermore, the easy-in-plane magnetic films may be subdivided into regions coupled through exchange interactions and the in-plane fixed magnetic layers in the input magnetic stacks can be used in non-volatile logic and memory.

Transistor that employs collective magnetic effects thereby providing improved energy efficiency

A Topological INsulator-based field-effect transistor (TINFET) is disclosed. The TINFET includes a first and second gate dielectric layers separated by a topological insulator (TI) layer. A first gate contact is connected to the first gate dielectric layer on the surface that is opposite the TI layer. A second gate contact may be connected to the second gate dielectric layer on the surface that is opposite the TI layer. A first TI surface contact is connected to one surface of the TI layer, and a second TI surface contact is connected to the second surface of the TI layer.

Topological insulator-based field-effect transistor

A bi-layer pseudo-spin field-effect transistor (BiSFET) is disclosed. The BiSFET includes a first and second conduction layers separated by a tunnel dielectric. The BiSFET transistor also includes a first gate separated from the first conduction layer by an insulating dielectric layer, and a second gate separated from the second conduction layer by an insulating layer. These conduction layers may be composed of graphene. The voltages applied to the first and/or second gates can control the peak current and associated voltage value for current flow between top and bottom conduction channels, and interlayer current voltage characteristic exhibiting negative differential resistance. BiSFETs may be used to make a variety of logic gates. A clocked power supply scheme may be used to facilitate BiSFET-based logic.

Bi-layer pseudo-spin field-effect transistor

Growing community of inventors

Austin, TX, United States of America

Allan MacDonald