Intel Corporation

Etec Systems, Inc.

Ateq Corporation

Allan L Goodman

Robin Lynn Teitzel

Matthew J Jolley

John L Wipfli

Morris H Green

David L Budde

Stephen R Colley

Stephen L Domenik

James D Howard

William R Goodman

Stephen P Sample

A rasterizer, particularly suited for generating patterns for semiconductor masks and the like is described. An 8.times.8 array uses RAS, CAS and WE signals in addition to the memory address for accessing the array. A state machine is used to convert the pattern data (e.g., type of object orientation, etc.) into accessing data with the WE generator being driven through a ROM.

Rasterizer for pattern generator

An execution unit which is part of a general-purpose microprocessor, partitioned between two integrated circuit chips, with the execution unit on one chip and an instruction unit on another chip. The execution unit provides the interface for accessing a main memory to thereby fetch data and macroinstructions for transfer to the instruction unit when requested to do so by the instruction unit. The execution unit receives arithmetic microinstructions in order to perform various arithmetic operations, and receives access-memory microinstructions in order to develop memory references from logical addresses received from the instruction unit. Arithmetic operations are performed by a data manipulation unit which contains registers and arithmetic capability, controlled by a math sequencer. Memory references are performed by a reference-generation unit which contains base-and-length registers and an arithmetic capability to generate and check addresses for referencing an off-chip main memory, and is controlled by an access sequencer.

Microinstruction execution unit for use in a microprocessor

An integrated circuit, slave microprocessor with its bus protocol is described. The slave unit may be activated by either a master microprocessor or a DMA controller. When activated by the DMA controller, handshaking signals between the controller and slave microprocessor permit the transfer of data between these units without intervention by the master microprocessor. Unique flags permit the master processor to readily determine the status of the slave microprocessor.

Slave microprocessor for operation with a master microprocessor and a

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Hillsboro, OR, United States of America

Allan L Goodman