Digital Equipment Corporation

Allan E Helenius

Tryggve Fossum

William F Bruckert

Thomas A Northrup

John C Manton

Richard E Glackemeyer

Stanley A Lackey, Jr

John A DeRosa, Jr

A central processor unit for a digital data processing system that processes prefetched instructions including a conditional branch instruction. The processor includes a fetch unit that has separate portions, one that retrieves operands and the other that retrieves instructions. When the fetch unit fetches a conditional branch instruction, it may continue to prefetch 'branch not taken' instructions using the instruction fetch portion. The fetch unit initially uses the operand fetch portion to prefetch 'branch taken' instructions. If it is determined that the branch is not taken, the prefetch operation is aborted, otherwise the prefetch operation is allowed to continue to provide the next instruction used by the processor.

Instruction prefetch system for conditional branch instruction for

A special instruction processor that connects to a central processing unit in a data processing system. The central processing unit processes a number of instructions. Instructions involving operands first retrieve the operands from memory, from general purpose registers in the central processor or the instruction stream. These operands are transferred to the special instruction processor. If the instruction is one of a predetermined set of instructions that is executed by the special instruction processor, the special instruction processor will, upon receiving the operands, generate an overriding signal that alters the operation of the central processor unit by inhibiting its processing of the operands. Instead, the special instruction processor unit, that is specifically designed to perform the operations efficiently, computes a result. When the result has been computed and the central processor has determined the location for receiving the result, the central processing unit retrieves the result and stores it. Operations are optimized if the instruction operand specifiers designate operands that are to be found in the instruction stream or the general purpose registers.

Accelerator processor for a data processing system

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Westford, MA, United States of America

Allan E Helenius