Honeywell International Inc.

Allalaghatta Pavan

Haowei Bai

Deepak R Kenchammana-Hosekote

Vicraj T Thomas

Brian Roger VanVoorst

Nemmara R Vaidyanthan

Srivatsan Varadarajan

Randall H Black

Ionut E Cardei

Lee B Graba

Blaine B Shelton

An adaptive multi-channel architecture for a wireless network is provided. A frequency hopping sequence generator module is compliant with a frequency hopping spread spectrum (FHSS) communications protocol. The frequency hopping sequence generator module is capable of performing FHSS concurrently on a plurality of communications channels. A frequency replacement module is coupled to the frequency hopping sequence generator module. The frequency replacement module is configured to receive feedback data over a feedback channel and adaptively select a transmission channel from the plurality of communications channels using the feedback data.

Adaptive multi-channel integrated wireless network system architecture

In one embodiment, a node comprises a plurality of IEEE 1394 subnet interfaces for communicating over a plurality of IEEE 1394 buses. Each of the plurality of IEEE 1394 subnet interfaces comprises a respective IEEE 1394 physical layer and IEEE 1394 link layer for communicating over a respective one of the plurality of IEEE 1394 buses. At least the IEEE 1394 physical layers for the plurality of subnet interfaces do not share hardware. The node further comprises at least one programmable processor that executes software that comprises common network layer functionality that interacts with all of the plurality of IEEE 1394 subnet interfaces and routes IEEE 1394 data packets among the plurality of IEEE 1394 buses.

IEEE 1394 gateway for fault-tolerant communication

In one embodiment, a system comprises a plurality of nodes and an IEEE 1394 bus. Each of the plurality of nodes comprises at least one IEEE 1394 interface for communicating over the IEEE 1394 bus. The plurality of nodes communicates over the IEEE 1394 bus in accordance with a rooted, half-binary tree topology. In another embodiment, a node comprises an IEEE 1394 interface to communicate over an IEEE 1394 bus. The node encapsulates logical data packets into IEEE 1394 data packets and maps a traffic class associated with each logical data packet to an IEEE 1394 class of service for the IEEE 1394 data packet into which that logical data packet is encapsulated.

IEEE 1394 network for deterministic and/or fault-tolerant communication

An initiator node in a local cluster included in a wireless network receives an admission request to execute an application comprising a set of tasks. If the initiator node is unable to map the set of tasks to nodes included in the local cluster, the local cluster head node forwards the admission request to the cluster head node of successive clusters in the wireless network in order to have at least one node in each of the successive clusters send resource availability information to the initiator node. The initiator node attempts to map the set of tasks to a subset of the nodes from which resource availability information has been received. This is repeated until the initiator node is able to map the set of tasks to a subset of the nodes in the wireless network or until there are no additional clusters to forward the admission request to.

Resource management for ad hoc wireless networks with cluster organizations

A network scheduler for real time applications is described. The network scheduler supports scheduling of network packets in a multi-threaded operating system to insure correct scheduling order and to preclude kernel preemption of active threads. The network scheduler resides between a kernel (and device drivers) and multiple sessions at the user-level. The network scheduler uses input/output control primitives such as HOLD and RELEASE to control servicing of the queues of packets at the kernel or network device driver. The control primitives serve as a middleware interface to the underlying kernel or network device driver. The network scheduler functions as a proxy scheduler to manage the queues of packets at the kernel or network device driver.

Network scheduler for real time applications

A distributed block-based programming model for control applications such as multimedia based real-time applications is described. According to one aspect of the invention, user program specifies interconnections between a plurality of program blocks distributed across a plurality of processing nodes. The user program is automatically translated into a system-level program having a program fragment for each one of the processing nodes. Each one of the program fragments comprise the program blocks located on the processing node and one or more system-level blocks for establishing connections between the processing node and a different processing node across a network.

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Minneapolis, MN, United States of America

Allalaghatta Pavan