National Instruments Corporation

Louisiana State University and Agricultural & Mechanical College

Aljosa Vrancic

Jacob Kornerup

Biren Shah

Jeffrey L Kodosky

Darshan K Shah

Michael L Santori

David W Madden

Hugo A Andrade

David W Fuller, Iii

Jeffrey N Correll

John Robert Breyer

Timothy J Hayles

Steve Rogers

Matthew C Curtis

Sundeep Chandhoke

Lothar Wenzel

Darren R Schmidt

Andrew C Thomson

Glen Sescila

Satish V Kumar

Bob Preis

Andrew Michael Lynch

Sean P McGlynn

Kresimir Rupnik

Jeremy Mielens

John Ammerman

Jacob Komerup

Systems and methods for emulating a channel for wireless communications between a transmit (TX) system-under-test (SUT) and a receive (RX) SUT. The TX and RX SUTs include integrated antenna arrays for transmitting and receiving wireless signals. For a plurality of paths of the emulated channel, and for each antenna element of the TX SUT, a respective phase shift and gain modification is applied to a wireless signals transmitted by the respective antenna element. The phase shifts and gain modifications emulate path length differences between different antenna elements. The signals for each antenna element are summed, and a path-specific modification is applied to each aggregate signal for each path. For each RX antenna element, phase shift and gain modifications are applied to emulate path-length differences for the RX antenna elements, the resultant signals are summed for each path, and the emulated wireless signals are output to the RX antenna elements.

Reduction of emulated channel count for phased-array systems through angle-of-arrival processing

Generating a schedule for a distributed real time system. At least one schedule generator may receive temporal properties from respective timed functions executing on master devices, where each master device is connected to a respective plurality of slave devices. Each master includes one or more timed functions configured to control timing of physical input and/or output operations for the respective plurality of slave devices, and streams between the master device and the respective plurality of slave devices. The schedule generator may receive associations between the timed functions and streams between master devices, and generate respective schedules for the masters based at least in part on the temporal properties and the associations. The respective schedules may be distributed to the master devices, and are useable by the master devices to control execution of the timed functions and the streams between the master devices in real time in a coordinated manner.

Timed functions for distributed decentralized real time systems

System and method for distributed execution of a graphical program. A graphical program is displayed on a display of a computer system. Targeted execution of a first graphical program portion of the graphical program on an execution target is graphically specified. The graphical specification includes displaying a visual indication of the specified targeted execution on the display of the graphical program. During execution of the graphical program, the first graphical program portion executes on the specified execution target and a remainder of the graphical program executes on a default execution target.

Graphically specifying and indicating targeted execution in a graphical program

A system and method for specifying timing relationships among nodes in a graphical program. User input specifying desired timing of a first node with respect to timing of a second node may be received. In various embodiments, any kind of timing relationship or timing constraint between the first node and the second node may be specified. Timing information may be displayed on the display to visually indicate the timing of the first node with respect to timing of the second node. In one embodiment, displaying the timing information may comprise displaying a timing wire between the first node and the second node. The graphical program may be executed in such a way that the visually indicated timing of the first node with respect to timing of the second node is satisfied.

Graphically representing timing in a graphical program

Timing wires in a graphical program

System and method for controlling/analyzing a process by solving a system of linear equations in real-time. Linear equations that model the process are stored. In an off-line stage a partitioning strategy is determined based on the linear equations, including determining groups of values for recursively partitioning a set of values measured and/or computed from the process. In an on-line stage: current process data are received from the process, including measurements from the process, and composing a set of values; the linear equations are recursively solved for a first group of the set, where the first group partitions the set into respective subsets of values, and where the recursively solving produces solved values for respective first groups of the set/subset of values; the linear equations are solved for remaining unsolved values in the set, thereby producing solved values for the set, which are stored and are useable to control/analyze the process.

Controlling or analyzing a process by solving a system of linear equations in real-time

A system and method for enabling deterministic or time-triggered data exchange between a first graphical program and a second graphical program. A first variable is assigned to a first time slot in a network cycle. A first graphical program may be configured to write data to the first variable. A second graphical program may be configured to read data from the first variable. The first graphical program may be executed on a first computer system, where executing the first graphical program comprises writing data to the first variable. Writing data to the first variable may cause the data to be delivered over a network to a second computer system when the first time slot occurs. The second graphical program may be executed on the second computer system, where executing the second graphical program comprises reading from the first variable the data sent from the first computer system.

Deterministic communication between graphical programs executing on different computer systems using variable nodes

System and method for creating a graphical program (GP) having portions that execute on different targets. A GP including a plurality of interconnected nodes visually indicating functionality of the program is created in response to user input, including a first graphical code portion with a first execution context specifying execution of the first graphical code portion on a first target. A second execution context indicating a second target for execution of a second graphical code portion of the GP is established in response to user input, e.g., by displaying a context structure indicating the second execution context and associating the second graphical code portion with the context structure in response to user input. During execution of the GP, the first graphical code portion executes on the first target using the first execution context, and the second graphical code portion executes on the second target using the second execution context.

Execution contexts for a graphical program

A first graphical program executing on a first device may execute a first graphical code portion for a plurality of iteration. Various systems and methods for synchronizing the execution of the iterations of the first graphical code portion with graphical code portions executing iteratively in graphical programs on other devices are described. Various systems and methods for synchronizing the execution of the iterations of the first graphical code portion with operation of measurement devices or other devices are also described.

Synchronizing graphical programs executing on respective computer systems

System and method for distributed execution of a graphical program. First and second icons associated with respective execution targets are displayed on a display. Each icon has an interior and specifies execution of a respective graphical program portion positioned in the interior of the icon on the respective execution target. First and second graphical program portions are respectively displayed in the interiors of the first and second icons, where each graphical program portion comprises a respective one or more interconnected nodes that visually indicate functionality of the graphical program portion. One or more wires connecting the first graphical program portion and the second graphical program portion are display. During execution of the graphical program, the first and second graphical program portions execute respectively on the first and second execution targets, and the first graphical program portion and the second graphical program portion communicate as specified by the one or more wires.

Diagram that visually indicates targeted execution

Execution target structure node for a graphical program

Deterministic communication between graphical programs executing on different computer systems

A 'timed loop with frames' node may be included in a graphical program. The 'timed loop with frames' node may combine a timed loop with a timed sequence such that the timed sequence is executed at each iteration of the timed loop. The &#x201c;timed loop with frames&#x201d; node may be configured with first execution timing information that controls execution timing for the iterations of the loop. A plurality of graphical code portions may be included in the &#x201c;timed loop with frames&#x201d; such that a sequential order of execution for the graphical code portions is specified. The &#x201c;timed loop with frames&#x201d; node may be configured with second execution timing information that controls execution timing for the graphical code portions executed at each iteration.

Timed loop with sequence frames structure for a graphical program

A system and method for executing a plurality of graphical code portions as a timed sequence is described. The graphical code portions may be included in a graphical program and configured with information specifying a sequential order of execution and execution timing information. During execution of the graphical program, the graphical code portions are executed sequentially in the sequential order and in accordance with the execution timing information. In one embodiment a timed sequence structure node may be utilized to specify the timed sequence. For example, the user may include the timed sequence structure node in the graphical program and associate the plurality of graphical code portions with the timed sequence structure node such that the timed sequence structure node species a sequential order of execution for the graphical code portions. The user may also configure the timed sequence structure node with execution timing information for one or more of the graphical code portions.

Timed sequence for a graphical program

A combination structure node is provided by a graphical programming development environment for use in a graphical program, where the combination structure node is operable to perform two or more control flow functions. For example, the combination structure node may be operable to perform two or more of: iteration, looping, conditional branching, sequencing, timed execution, event-driven execution, or other control flow functions. A user may include the combination structure node in a graphical program and associate a graphical code portion with the combination structure node. During execution of the graphical program, the combination structure node is operable to cause the associated graphical code portion to execute according to the two or more control flow functions performed by the combination structure node.

Growing community of inventors

Austin, TX, United States of America

Aljosa Vrancic