Marvell International Limited

Mediatek Singapore Pte. Ltd.

Alireza Shirvani-Mahdavi

George Chien

Wayne A Loeb

Lawrence Tse

King Chun Tsai

Sang Won Son

Yuan-Ju Chao

I-Chang Wu

Qiong Sun

Leycheoh Lim

Saeed Chehrazi

A duty cycle detector and calibration system is disclosed. In some embodiments, a duty cycle calibration system includes a first tuning circuit operative to receive an input signal, tune a duty cycle of the input signal to within a first error range, and provide a first output signal. A second tuning circuit tunes a duty cycle of the first output signal to within a second error range and provides a second output signal, where the second error range has more precision than the first error range. A duty cycle detector provides a duty cycle detection signal indicative of a duty cycle of the second output signal, and logic controls the first and second tuning circuits based upon the duty cycle detection signal.

Signal duty cycle detector and calibration system

Embodiments for processing signals are disclosed. In one embodiment, a method includes receiving signals from at least two non-contiguous channels, where the at least two non-contiguous channels are within a predetermined bandwidth, and where each of the at least two non-contiguous channels has a center frequency. The method also includes utilizing an average of the center frequencies of the at least two non-contiguous channels to down convert the at least two non-contiguous channels to a combined intermediate frequency (IF) channel that has a center frequency that is an average of a difference between the center frequencies of the at least two non-contiguous channels. The method also includes down converting the combined IF channel to a combined channel at a baseband frequency. The method also includes recovering the at least two non-contiguous channels from the combined channel at a baseband frequency utilizing an upper sideband and lower sideband recovery mechanism.

Receiving and transmitting signals across non-contiguous channels in a communication system

In one embodiment, a local oscillator (LO) is configured to generate an LO signal. A transmission line receives the LO signal from the local oscillator and transmits the LO signal. A first set of taps and a second set of taps tap the transmission line to receive the LO signal. A plurality of transceiver blocks are configured to receive and transmit a plurality of phase-shifted radio frequency signals. Each transceiver block is coupled to a first tap and a second tap. Each LO signal received for a transceiver block is received with a different phase. However, the same reference phase may be calculated from a first LO signal received from the first tap and a second LO signal received from a second tap. Each transceiver block receives the reference LO signal having the reference phase determined from the first LO signal and the second LO signal.

Phase synchronization of phased array or multiple receiver/transmitter systems

Systems, devices and techniques relating to power amplifier protection include, in some implementations, a circuit including: attenuation circuitry to couple with an output of detection circuitry that provides a protection signal and to couple with an input of power amplifier circuitry; turn off circuitry to couple with the power amplifier circuitry, the turn off circuitry configured to turn off the power amplifier circuitry responsive to the protection signal; and the attenuation circuitry configured to reduce a gain of the power amplifier circuitry responsive to the protection signal, the attenuation circuitry comprising a delay stage configured to continue attenuating an RF input signal of the power amplifier circuitry until after the power amplifier circuitry turns on.

Power amplifier protection

Methods and apparatus are provided for performing loopback testing of integrated circuits ('ICs'). In an embodiment of the invention, an IC can be tested on an undiced wafer by coupling a wireless transmitter of the IC to a wireless receiver of the IC. Core circuitry of the IC can be controlled to cause the transmitter to send at least one signal to the receiver. Upon receipt of the at least one signal, the receiver can send a signal to the core circuitry, which can determine, and possibly record, whether the transmission and receipt were successful. The invention advantageously facilitates efficient testing of unpackaged ICs at the wafer level.

Methods and apparatus for integrated circuit loopback testing

A circuit includes: an input of shunt circuitry to couple with an output of detection circuitry that provides a protection signal; an output of the shunt circuitry to couple with an input of power amplification circuitry; and the shunt circuitry configured to reduce a gain of the power amplification circuitry responsive to the protection signal, the shunt circuitry including a delay stage configured to continue shunting of an input signal of the power amplification circuitry for a time period corresponding to a turn on time of the power amplification circuitry. In addition, a method includes: receiving a protection signal from detection circuitry; responsive to the protection signal, shunting an input signal of power amplification circuitry to reduce a gain of the power amplification circuitry; and continuing the shunting for a time period corresponding to a turn on time of the power amplification circuitry.

Systems and methods are provided for calibrating the control mechanism in a communication circuit to allow the communication circuit to maintain a desired output power level. The communication circuit includes a variable gain adjustment circuit and a power amplifier, which operate together to provide an output power level. A control circuit controls the variable gain adjustment circuit based on a default gain parameter, a high power threshold, and a low power threshold. A calibration circuit in the control circuit calibrates a default gain parameter to provide a desired output power. A power detector can detect the desired output power level to provide an output power measurement. The calibration circuit calibrates upper and lower power thresholds to provide an acceptable range of power variation around the output power measurement.

Systems and methods for calibrating power regulated communication circuitry

Circuits and methods are provided for generating reference currents. In one implementation, a circuit is provided that includes a first source and a current control circuit in communication with the first source. The first source generates a first reference current that is a ratio of a first reference voltage and an external resistance. The current control circuit produces a second reference current that is a ratio of a second reference voltage and the external resistance. The current control circuit produces the second reference current without being directly coupled to the external resistance.

Dual reference current generation using a single external reference resistor

A power amplifier protection circuit that includes protection circuitry to variably shunt an input radio frequency (RF) signal to AC ground, turn off bias to an output transistor of a power amplifier, and turn off the output transistor. The power amplifier protection circuit features an asymmetrical control that can quickly shut off a power amplifier, and turn on the power amplifier at a steady, controlled rate when an output transistor exceeds a predetermined threshold voltage.

A geometric ladder circuit produces a transfer function having substantially uniform steps measured in dB. Where the ladder has a plurality of substantially identical resistor rungs of a first resistance, one stile that is a conductor connecting the rungs, and another having a series of substantially identical resistors of a second resistance, then for identical currents injected at different rungs, the output signal at an end of the ladder is attenuated by a number of substantially equal steps, one for each rung between input and output. For a ladder with a base rung R, an output at an end opposite the base rung, stile resistors of resistance &#x3b1;R, and other rungs all of resistance (1+(1/&#x3b1;))R, the step size is 20 log(1+&#x3b1;).

Geometric ladder circuit with linear-in-dB transfer function

A system for controlling the true output power of a transmitter includes a voltage detector in communication with a power amplifier for detecting an output voltage of the power amplifier and generating a voltage signal proportional to the output voltage. A current detector in communication with the power amplifier detects an output current of the power amplifier and generates a current signal proportional to the output current. A power detector in communication with the voltage and current detectors detects a true output power delivered by the power amplifier. The power detector includes a multiplier for multiplying the current signal and the voltage signal to generate a power signal proportional to the true output power. A power controller in communication with the power detector and the power amplifier controls the power amplifier to regulate the true output power based on the power signal.

System and method for controlling true output power of a transmitter

A variable gain amplifier uses a geometric ladder circuit that produces a transfer function having substantially uniform steps measured in dB. Where the ladder has a plurality of substantially identical resistor rungs of a first resistance, one stile that is a conductor connecting the rungs, and another having a series of substantially identical resistors of a second resistance, then for identical inputs at different rungs, the output signal at an end of the ladder is attenuated by a number of substantially equal steps, one for each rung between input and output. For a ladder with a base rung R, an output at an end opposite the base rung, stile resistors of resistance &#x3b1;R, and other rungs all of resistance (1+(1/&#x3b1;))R, the step size is 20 log(1+&#x3b1;). By using such ladders in op-amp feedback loops, chaining different stages with different values of &#x3b1;, coarse and fine gain adjustment can be provided.

Linear-in-dB variable gain amplifier using geometric ladder circuit

Circuits and methods are provided for variable gain amplification. In one implementation, a circuit is provided that includes a control circuit, an amplifier circuit, and a gain circuit. The control circuit receives a control signal and produces a current control signal, the current control signal being a ratio of a first current and a second current. The amplifier circuit is operable to apply a gain to an input voltage for producing an output voltage. The gain circuit is in communication with the control circuit and the amplifier circuit and receiving the current control signal, the gain circuit operable to adjust the gain responsive to a change in the control signal.

Growing community of inventors

San Jose, CA, United States of America

Alireza Shirvani-Mahdavi